登录
首页 » Verilog » (7,4)汉明码

(7,4)汉明码

于 2021-03-29 发布
0 107
下载积分: 1 下载次数: 2

代码说明:

说明:  汉明码学习,以(7,4)为例,仿真正常。(Hamming code learning, taking (7, 4) as an example, the simulation is normal.)

文件列表:

(7,4)汉明码\ECC_code.v, 667 , 2019-04-03
(7
,4)汉明码\ECC_code_tst.v, 273 , 2019-04-02
(7
,4)汉明码\ECC_decode.v, 2963 , 2019-04-11
(7
,4)汉明码\ECC_decode_tst.v, 985 , 2019-04-03
(7,4)汉明码, 0 , 2019-05-08

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • IC设计基础
    一本很经典的IC设计中文入门书籍,由任艳颖,王彬编著,翻印几百万册(A very classic introduction to Chinese in IC design book, compiled by Ren Yanying and Wang Bin, reprinted millions of copies)
    2020-06-23 22:20:02下载
    积分:1
  • 4位BCD计数器
    用Verilog语言编程实现4位BCD计数器的功能(Write the programm with Verilog language to implement the function of 4 - bit BCD counter.)
    2020-11-30 13:49:27下载
    积分:1
  • new
    说明:  vivado2017.4下的串口通信的Verilog源码,一次传输8位,包括发送模块,接受模块,顶层模块(Verilog source code for serial communication under vivado 2017.4, which transmits 8 bits at a time, including sending module, receiving module and top module)
    2020-06-22 20:20:01下载
    积分:1
  • uart
    可以进行连续uart串口读写999次以上不出错,已经检测成功(It can read and write serial UArt more than 999 times without error. It has been detected successfully.)
    2020-06-15 22:50:02下载
    积分:1
  • mig_v7_4
    说明:  针对XILINX 7系列FPGA 中MTG的驱动代码,代码的接口部分主要分为两个部分,一是控制DDR的DMA大小,选择读写,每次DMA的起始地址;二数据部分为AXIS。 已经在多个工程中使用。(For the driver code of MTG in XILINX 7 series FPGA, the interface part of the code is mainly divided into two parts, one is to control the DMA size of DDR, select read and write, the starting address of each DMA; the second data part is AXIS. It has been used in multiple projects.)
    2020-05-09 16:05:17下载
    积分:1
  • RISC-V-Reader-Chinese-v2p1
    说明:  RISC-V手册 最新版 一本开源指令集的指南 我们打算将这本薄薄的书作为 RISC-V的介绍和参考 资料 ,供有兴趣编写 RISC-V代码的 学生和嵌入式系统程序员使用 。 本书假设读者事先已经 了解 过至少一个指令集。如果没 有,您可能希望浏览基于 RISC-V的相关入门架构手册: Computer Organization and Design RISC-V Edition: The Hardware Software Interface。(risc v reader chinese)
    2020-05-07 10:58:23下载
    积分:1
  • Uart
    RS422通信程序,Verilog语言,此模块实现422通信功能(RS422 communication program, Verilog language, this module implements 422 communication function.)
    2021-04-07 14:59:02下载
    积分:1
  • 4位二进制同步计数器
    用Verilog语言实现4位二进制同步计数器的功能(Write a program in Verilog language to implement the fouction of Four binary synchronous counters.)
    2020-11-20 15:19:37下载
    积分:1
  • axi_dma
    在zedboard开发板上采用vivado通过AXI进行DMA数据传输(Using vivado to transfer DMA data through AXI on zedboard development board)
    2020-12-01 20:49:25下载
    积分:1
  • 前导零CPU
    在多周期CPU的基础上设计一个前导0检测程序。(A preamble 0 detection program is designed on the basis of multi period CPU.)
    2017-10-11 21:26:01下载
    积分:1
  • 696522资源总数
  • 104042会员总数
  • 18今日下载