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openmv识别红绿蓝物块颜色，并输出物块距离
使用openmv识别红绿蓝物块颜色，黑色和白色也有简易识别。并且可以计算出颜色物块的距离。配置uart窗口输出物块颜色代码和距离。
- 2020-07-04下载
- 积分：1
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基于联盟博弈的协作感知模型的融合算法和matlab程序
此算法和程序是用来求解认知无线电协作感知的协作模型的。这种协作模型是通过联盟博弈得到的。上传的程序则通过matlab编程和仿真，实现了通过联盟博弈求解协作模型的融合算法。
- 2020-12-04下载
- 积分：1
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基于RLS算法的语音噪声回声消除处理MATLAB代码
基于RLS算法的语音噪声回声消除处理MATLAB代码，可以对有回声或者有噪音的语音信号进行自适应滤波处理重建原始语音信号。
- 2020-12-11下载
- 积分：1
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CNN处理kdd99数据集（tensorflow实现）
基于Tensorflow用CNN（卷积神经网络）处理kdd99数据集，代码包括预处理代码和分类代码，准确率99.6%以上，并且快速收敛至最优值。 (Based on Tensorflow (convolutional neural network) processing KDD99 data set based on CNN, the code includes preprocessing code and classification code, the accuracy rate is more than 99.6%, and quickly converge to the optimal
- 2019-11-17下载
- 积分：1
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web动态网页期末大作业报告+代码
web动态网页期末课程作业。包括报告+源码。做的是一个论坛系统JSP做的。
- 2020-12-06下载
- 积分：1
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多功能电表软件系统设计
电能表的软件系统包括程序数据结构模块、程序初始化与电表运行处理模块、事件分配查询管理处理模块及显示处理模块、通讯处理模块、电量处理模块、时间与时段管理处量模块、电表最大需量处理模块八大部分组成，各个部分都有其特殊的任务，在电表系统中完成它们相应的功能。●●●●程序数据结构部分●●●●●●●●●程序数据结构部分程序数据结构模块是对程序中的数据进行分析,合理的分配数据内存,定义程序涉及的变量。它是根据整个程序的算法来制定的,同时一个好的数据结构对整个程序的编写有非常重要的作用,因此根据电能表软件系列实现的功能及其算法制定合理的数据结构。电能表的数据结构包括两个部分:内存数据结构和数据结构与常量结构。●这个是与常量的数据结构,在显小与数据通讯都会使用这个结构●●●●●●●●●程序常量数据结构部分●●●●数据标示项数据标示表示的正反数据存放的格式数据值的长度数据在与的偏移量数据显示的符号通过此结构可以把所要显示、通讯的数据在或者在存放的位置长度以极标志等内睿取出供所需要的函数使用●●●●程序数据结构部分●●●●●●●●●合相有功功率合相有功瞬时功率电压有校值合电流有校值当前的线频率合功率因数合相电压与电流的夹角当前的电能此结构可以对的计量参数寄存器一次可以全读出,并同时也可以分别取出对应所需要的参数●●●●●●●●●程序初始化与电表运行处理●●●●程序初始化与电表运行处理●程序初始化与电表运行处理模块是对整个程序进行初始化,并对电表运行的六种状态进行转换。程序初始化包括两个部分:初始化和电表各部件初始化。初始化是对各部件进行初始化,为各部件在程序工作时提供合适的初始状态,它包括配置口工作模式、看门狗初始化、定时器初始化、键盘中断初始化、串口中断初始化、初始化等等。电表各部件初始化是对电能表系统各部件进行配置工作状态,初始化它们的工作方式,为程序工作提供电表部件初始状态,它包括指示灯初始化显示初始化、实时时钟初始化、电量恢复、通讯信道、历史电量处理等等部件的初始化。●●●●口工作模式●●●●●●●●●口工作模式如果有没有用到的口,作输入时要通过电阻与或者与连接,作输出时要输出置与置因为设备输入端未连接将会产生工作枚障,如果输入未连接,则由于噪音等原因可能会产生内部输入电平,从而导致故障。如果在上电时口为输入,但电池供电时口的电平为不确定状态时,也应对口作相应的处理●当主时钟切换到副时钟时,应将主时钟的口设为输出置看门狗初始化●●●●●●●●可选字节设定地址:080H/Ls0HrWINDOW1F工NDOWWDCSWDCS1WDCSLSROSC看门狗的开了NDCW1VINDOMO看门狗定封器窗口打开周期窗时间设定为1C5WDTCN看门狗定时器计数器的操作控制/非法汸问检测琹止计数器操怍复位后停止计数),禁止非法访问检测操作允许计数器橾作;愆位后始计敏),氘许非法访闻枱测橾作看门狗定时器HD,FDCS1HDCEO昋门狗定时器溢出吋间0z°/faL(3.88ms)时间间隔设置n/f!(7.76ms):25/土R(3L.03ms0CTL (62, OG sD0125fsL(124.12mE)fL(496.4LSROSC内部低速振蓠器操作看门狗设为不可由软件停1(出将1写入C寄存器的第0红 SESTOP)时停l操作不能停止(即使将1写入 SRSTOP位也不停止操作)能停止单片机内部的看门狗把设为不能停止时为硬看门狗,必须在窗口打开才能清狗否则单片机会复位,●●●●串口中断初始化●●●●●●●●●●由于多功能表有二个供通讯的口,一个供红外通讯口。但单片机只有二个哪么就需要模拟其中一个的分频时钟信号不能得到此时应选的分分频时钟信号模拟红外通讯,需要个外部中断(接收接收管上的电平信号并每要检测屮断口的信号),二个定时器(输出载波与的时间间隔)串口中断初始化有关UART0的寄存器波特率发生控制寄存器0( BRGCO)真出:F? iH Aher reset: 1Fh民WEymarBRGCOTPE01TP90O0 MDLO4MPLSMDLDe MDLoTBLOm(TPS01,TPS00)=(0,0)选择定时器TM50的输出作为TPSDTP500Base cock (IxeLKol selection"fPRs=2 MHz fFRE-5 MHz fFRs-B MHz1FFG-10MH基本时钟TM50 DutpfEgli1 H25 H4 HT5 MHz250kF2H25 kHz1 MH26H2625kH15625kH2250H3125k因为如果选择外围硬件时钟fprs作为基本时钟,那么就不可能产生出1200bps的波特率。MDLO4MDLOS MDLO2 MDLOT MDLOG k Selectian of 5-titcounterx Selng Erchbiled0acLM/B0(MDLO4, MDL03, MDLO2MDL01,ML00)=(0,1,1,0,1),k=13028 fruTa2a scLk/?31t/3
- 2020-11-30下载
- 积分：1
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基于LABVIEW的温度采集管理设计
该系统主要是基于labview实现的简单系统，能够实现温度的随机采集、曲线分析、平均值、最大值读取、以及历史数据的读取和打印功能
- 2021-05-07下载
- 积分：1
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数学分析中的典型问题与方法 最清晰！最完整
考研必备 但做起来很痛苦 应该算是数学系的吉米多维奇吧
- 2020-07-04下载
- 积分：1
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MIPI Alliance Specification for D-PHY
MIPI Alliance Specification for D-PHY Version 1.00.00 – 14 May 2009配合“MIPI Alliance Specification for Camera Serial Interface 2 (CSI-2)“ 一起看。http://download.csdn.net/detail/micro_st/4242724Version1.00.0014-May-2009MIPI Alliance Specification for D-PHY2 The material contained herein is not a license, either expressly or impliedly, to any IPR owned or3 controlled by any of the authors or developers of this material or MIPl. The material contained herein is4 provided on an"as iS basis and to the maximum extent permitted by applicable law, this material is5 provided AS IS AND WITH ALL FAULTS, and the authors and developers of this material and MIP6 hereby disclaim all other warranties and conditions, either express, implied or statutory, including, but not7 limited to, any (ifany)inplied warranties, duties or conditions of merchantability, of fitness for a8 particular purpose, of accuracy or completeness of responses, of results, of workmanlike effort, of lack of9 viruses, and of lack of negligence10 All materials contained herein are protected by copyright laws, and may not be reproduced, republisheddistributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express12 prior written permission of MIPI Alliance. MIPl, MIPI Alliance and the dotted rainbow arch and all related3 trademarks, tradenames, and other intellectual property are the exclusive property of MIPI Alliance and14 cannot be used without its express prior written permission15 ALSO, THERE IS NO WARRANTY OF CONDITION OF TITLE, QUIET ENJOYMENT, QUIET16 POSSESSION. CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH17 REGARD TO THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT.IN NO EVENT WILLI8 ANY AUTHOR OR DEVELOPER OF THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT9 OR MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE20 GOODS OR SERVICES. LOST PROFITS. LOSS OF USE. LOSS OF DATA OR ANY INCIDENTAL.21 CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER22 CONTRACT TORT WARRANTY OR OTHERWISE ARISING IN ANY WAY OUT OF THIS OR23 ANY OTHER AGREEMENT SPECIFICATION OR DOCUMENT RELATING TO THIS MATERIAL24 WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH25 DAMAGES26 Without limiting the generality of this Disclaimer stated above, the user of the contents of this Document is27 further notified that MIPI: (a)does not evaluate, test or verify the accuracy, soundness or credibility of the28 contents of this Document;(b)does not monitor or enforce compliance with the contents of this Document29 and (c)does not certify, test, or in any manner investigate products or services or any claims of compliance30 with the contents of this Document. The use or implementation of the contents of this Document may31 involve or require the use of intellectual property rights ("IPR")including(but not limited to) patents32 patent applications, or copyrights owned by one or more parties, whether or not Members of MIPIMIPI33 does not make any search or investigation for IPR, nor does miPi require or request the disclosure of any34 IPR or claims of IPR as respects the contents of this document or otherwise35 Questions pertaining to this document, or the terms or conditions of its provision, should be addressed36 MIPI Alliance. Inc37 c/o IEEE-ISTO38 445 Hoes lane39 Piscataway, NJ0885440 Alin: Board SecretaryCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY42 Contents43 Draft Version 1.00.00-14 May 2009441 Overview1451.2 Purpose.…..,.,.,,.,..472 Terminology…2.1 Definitions162.2 Abbreviations…172.3 Acronyms51 3 D-PHY Introduction523.1 Summary of Phy functionality533.2 Mandatory Functionality················2054 4 Architecture21554.1 Lane modules…564.2 Master and slave2254.3 High Frequency Clock Generation22584.4 Clock lane data lanes and the phy-Protocol interface.224.5 Selectable Lane Options·;····················234.6 Lane Module Types4.6.1 Unidirectional Data Lane…264.6.2 Bi-directional data lanes26634.6.3 Clock lane.274.7 Configurations….7654.7.1 Unidirectional Configurations............664.7.2Bi-Dal Half-Duplex Configurations674.7.3 Mixed Data Lane configurations32Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidential111Ⅴ ersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY695.1Transmission Data Structure,………………………∴335.1.1Data unitsa勹5.1.2 Bit order Serialization and De-Serialization33725.1.3 Encoding and decoding735.1.4 Data Buffering,33745.2 Lane States and Line levels755.3 Operating Modes: Control, High-Speed, and Escape5. 4 High-Speed Data Transmission··········;·5. 41 Burst payload data785.4.2 Start-of-Transmission795.4.3End-of-transmission805.4.4 HS Data Transmission burst.365.5 Bi-directional data Lane turnaround5.6 Escape Mode41835.6.1Remote triggers42845.6.2 Low-Power data Transmission43855.6.3 Ultra-Low Power State865.6.4 Escape Mode State Machine43875.7 High-Speed Clock Transmission885. 8 Clock lane Ultra-Low Power State50959 Global Operation Timing Parameters.……5.10 System Power States56915.11 Initialization56925.12 Calibration5.13 Global Operation Flow Diagram57945.14 Data Rate Dependent Parameters(informative)955. 14.1 Parameters Containing Only UI values965. 14.2 Parameters Containing Time and Ul values59Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY5.14.3 Parameters Containing Only Time Values…………5.14.4 Parameters Containing Only Time Values That Are Not Data Rate Dependent6 Fault detection611006.1 Contention detection1016.2 Sequence Error Detection.……611026.2.1 SoT Error621036.2.2 SOT Sync Error1046.2.3 EoT Sync Error1056.2. 4 Escape Mode Entry Command error.1066.2.5 LP Transmission Sync error621076.2.6 False Control error1086.3 Protocol Watchdog Timers(informative)62l096.3.1 HS RX Timeout6.3.2HS TX Timeout………………·················+···:··:·················∴62l116.3.3Escape mode timeout62l126.3. 4 Escape Mode Silence Timeout6.3.5 Turnaround errors114 7 Interconnect and Lane Configuration.641157.1 Lane configuration1167.2 Boundary Conditions.....…647.3 Definitions………64l187.4S- parameter Specifications………….651197.5 Characterization Conditions207.6 nterconnect Specifications………1217.6.1 Differential characteristics1227. 6.2 Common-mode characteristics671237.6.3 Intra-Lane Cross-Coupling1247. 6. 4 Mode-Conversion limitsCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY1257.6.5 Inter-Lane Cross-Coupling671267. 6.6 Inter-Lane static skew1277.7 Driver and receiver Characteristics1287.7.1 Differential Characteristics1297. 7.2 Common-Mode characteristics1307.7.3 Mode-Conversion Limits1317.7.4 Inter-Lane Matching132 8 Electrical Characterislics701338.1 Driver characteristics1348.1.1 High-Speed Transmitter1358.1.2 Low-Power Transmitter1368.2 Receiver Characteristic·…············…·······…8301378.2.1 High-Speed Receiver801388.2.2Low- Power receiver.................….….821398.3 Line contention detection1408.4 Input Characteristics8441 9 High-Speed Data-Clock Timing1429.1 High-Speed Clock Timing861439.2 Forward High-Speed Data Transmission Timing871449.2.1 Data-Clock Timing Specifications1459.3 Reverse High-Speed Data Transmission Timing89146 10 Regulatory Requirements91147 Annex A Logical PHY-Protocol Inter face Description(informative)92148A 1 Signal Description149A 2 High-Speed Transmit from the Master Side150A3 High-Speed receive at the slave Sidel00151A 4 High-Speed Transmit from the Slave side152A.5 High-Speed Receive at the Master SideIOICopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialVersion1.00.0014-May-2009MIPI Alliance Specification for D-PHY153A6 Low-Power Data Transmission102154A7 Low-Power Data Reception.103155A 8 Turn-around156 Annex B Interconnect Design Guidelines (informative)105157B. 1 Practical distances105158B 2 RF Frequency Bands: Interference.105B3 Transmission Line design160B4 Reference Layer.106161B 5 Printed-Circuit board106162B6 Flex-foils106163B 7 Series resistance106164B 8 Connectors106165 Annex C 8b9b Line Coding for D-PHY(normative)107166C 1 Line Coding Features...·············108167C.1.1Enabled Features for the Protocol108l68C 1. 2 Enabled Features for the Phy108169C2 Coding scheme170C 2.1 8b9b Coding Properties.....108171C 2.2 Data Codes: Basic Code Set……….109C.2.3 Comma Codes: Unique Exception Codes110173C 2.4 Control Codes: Regular Exception Codes…10174C.2.5 Complete Coding Scheme………175C 3 Operation with the D-PhY…11117yload: Data and Control177C.3.2 Details for Hs transmission………112178C.3.3 Details for LP Transmissionl12179C 4 Error Signal180C5 Extended PplCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member ConfidentialⅤ ersion1.00.0014-May-2009MIPI Alliance Specification for D-PHYl81C.6 Complete Code Set.….….l15182Copyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidentialv111Version1.00.0014-May-2009MIPI Alliance Specification for D-PHYl83Figures184 Figure 1 Universal Lane Module functions21185 Figure2 Two Data Lane PHY Configuration.…………23186 Figure 3 Option Selection Flow Graph4187 Figure 4 Universal Lane Module Architecture25188 Figure 5 Lane Symbol Macros and Symbols Legend189 Figure 6 All Possible Data Lane Types and a basic Unidirectional Clock lane190 Figure 7 Unidirectional Single Data Lane Configuration30191 Figure 8 Unidirectional Multiple Data Lane Configuration without LPDT∴.30192 Figure 9 Two Directions Using Two Independent Unidirectional PHYs without LPDT.........31193 Figure 10 Bidirectional Single Data Lane Configuration31194 Figure 1l Bi-directional Multiple Data Lane Configuration......32195 Figure 12 Mixed Type multiple data Lane Configuration32196 Figure 13 Line level34197 Figure 14 High-Speed Data Transmission in Bursts36198 Figure 15 TX and rX State Machines for High-Speed Data Transmission37Figure16 Turnaround Procedure.……39200 Figure 17 Turnaround State Machine40201 Figure 18 Trigger-Reset Command in Escape Mode202 Figure 19 Two Data Byte Low-Power Data Transmission Example203 Figure 20 Escape Mode State Machine204 Figure2 I Switching the Clock Lane between Clock Transmission and low- Power mode………….47205 Figure 22 High-Speed Clock Transmission State Machine49206 Figure 23 Clock Lane Ultra-Low Power State State Machine········+·+···+·4···207 Figure 24 Data Lane Module State Diagram57208 Figure 25 Clock Lane Module state diagram58209 Figure 26 Point-to-point InterconnectCopyright C 2007-2009 MIPl Alliance, Inc. All rights reservedMIPI Alliance Member Confidential
- 2020-12-08下载
- 积分：1
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stm32使用pwm按键控制led灯强度
stm32使用pwm按键控制led灯强度。此代码用按键控制pwm的占空比改变电压，从而来控制led灯的光亮强度
- 2020-07-04下载
- 积分：1
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