ddr3_test

代码说明：

说明：  通过循环读写DDR3内存，了解其工作原理和DDR3控制器的写法，由于DDR3控制复杂，控制器的编写难度高，这里笔者介绍XILINX的MIG控制器情况下应用，是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)

文件列表：

ddr3_test\ddr3_test\.Xil\top_propImpl.xdc, 635 , 2017-12-21
ddr3_test\ddr3_test\ddr3.ucf, 17940 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.cache\wt\gui_handlers.wdf, 10929 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.cache\wt\gui_resources.wdf, 12377 , 2017-12-21
ddr3_test\ddr3_test\ddr3_test.cache\wt\java_command_handlers.wdf, 3802 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.cache\wt\project.wpc, 123 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.cache\wt\synthesis.wdf, 5382 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.cache\wt\synthesis_details.wdf, 100 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.cache\wt\webtalk_pa.xml, 9986 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.hw\backup\hw_ila_data_1.ila, 976045 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.hw\ddr3_test.lpr, 343 , 2016-07-22
ddr3_test\ddr3_test\ddr3_test.hw\hw_1\hw.xml, 141038 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.hw\hw_1\layout\hw_ila_1.layout, 197122 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\hw_1\wave\hw_ila_data_1\hw_ila_data_1.wcfg, 4345 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.hw\hw_1\wave\hw_ila_data_1\hw_ila_data_1.wdb, 1072987 , 2020-07-23
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\.xsim_webtallk.info, 60 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\labtool_webtalk.log, 396 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\labtool_webtalk.tcl, 3277 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\usage_statistics_ext_labtool.html, 5454 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\usage_statistics_ext_labtool.wdm, 1138 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.hw\webtalk\usage_statistics_ext_labtool.xml, 5182 , 2017-07-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ddr3\ddr3.veo, 6743 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ddr3\ddr3_stub.v, 3056 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ddr3\ddr3_stub.vhdl, 3222 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ila_0\ila_0.veo, 3322 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ila_0\ila_0_stub.v, 1640 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\ip\ila_0\ila_0_stub.vhdl, 1845 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\mem_init_files\mig_a.prj, 17423 , 2018-03-06
ddr3_test\ddr3_test\ddr3_test.ip_user_files\mem_init_files\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\README.txt, 130 , 2016-07-22
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\compile.do, 7761 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\ddr3.sh, 4811 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\ddr3.udo, 0 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\simulate.do, 291 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\activehdl\wave.do, 32 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\ddr3.sh, 5568 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\README.txt, 2097 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\ies\run.f, 7785 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\compile.do, 7826 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\ddr3.sh, 5024 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\ddr3.udo, 0 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\simulate.do, 301 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\modelsim\wave.do, 32 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\compile.do, 7802 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\ddr3.sh, 5135 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\ddr3.udo, 0 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\elaborate.do, 173 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\simulate.do, 185 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\questa\wave.do, 32 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\README.txt, 3236 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\compile.do, 7751 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\ddr3.sh, 4808 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\ddr3.udo, 0 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\simulate.do, 291 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\riviera\wave.do, 32 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\ddr3.sh, 14897 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\file_info.txt, 11070 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\vcs\simulate.do, 11 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\cmd.tcl, 464 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\ddr3.sh, 6255 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\elab.opt, 178 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\file_info.txt, 10784 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\mig_b.prj, 17423 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\README.txt, 2156 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\vlog.prj, 7347 , 2019-04-30
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3\xsim\xsim.ini, 19045 , 2017-12-16
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\compile.do, 7600 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\ddr3.sh, 4813 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\ddr3.udo, 0 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\file_info.txt, 10918 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\glbl.v, 1474 , 2017-12-14
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\mig_a.prj, 17423 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\README.txt, 2156 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\simulate.do, 284 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\activehdl\wave.do, 32 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\ies\ddr3.sh, 5564 , 2018-03-05
ddr3_test\ddr3_test\ddr3_test.ip_user_files\sim_scripts\ddr3_1\ies\file_info.txt, 10918 , 2018-03-05