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v3
说明： mojo v3 complete eagle schematic
- 2018-02-08 22:47:52下载
- 积分：1
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MVB通信架构和流程图
MVB架构流程图。MVB开发用，大连海天资料(MVB development, Dalian Haitian data)
- 2018-09-17 21:39:23下载
- 积分：1
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vivek
THIS IS A SOURCE CODE FOR LIFT IN VHDL LANGUAGE
- 2012-04-08 02:01:07下载
- 积分：1
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adc7606
给FPGA程序，使之产生信号，驱动AD7606读取数据，并行模式。(give FPGA signal to read AD7606)
- 2021-03-29 21:39:10下载
- 积分：1
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top
说明： FPGA程序的top.v文件，主要实现DDS信号发生器功能，通过定时器，可简单实现输出幅值无极跳变(FPGA procedures top.v documents, the main function of DDS signal generator, through the timer can be simple to achieve the output amplitude wuji hopping)
- 2008-12-05 16:18:28下载
- 积分：1
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FPGA_Book_cd
《无线通信FPGA设计》包含的所有例子源码，包括matlab仿真和verilog源码，本书内容还是非常丰富的，涉及无线通信领域各个方面。不过对于一些比较新的技术，其FPGA实现部分过于简略，难以在工程中实用化。(" Wireless FPGA Design" contains all the examples source code, including the matlab simulation and verilog source code, the contents of this book is still very rich, involved in all aspects of the field of wireless communications. But for some relatively new technology, some of its FPGA implementation is too brief, it is difficult in practical engineering.)
- 2009-10-26 14:50:33下载
- 积分：1
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HDMI接口编解码传输模块ASIC设计_刘文杰
说明： ? 熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。
? 利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
? 利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
? 利用双线性插值方法实现对图像640×480到1024×768的放大操作。
? 完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分：1
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sp605_BRD_rdf0033_13.2_c
spartan605评估板测试代码。xilinx官方资料(spartan605 uation board test code)
- 2014-12-23 22:27:45下载
- 积分：1
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eetop.cn_FPGA数字信号处理实现原理及方法
说明： 本书介绍基于FPGA实现数字信号处理的原理与方法，作为Xilinx公司相关课程的培训教材(The FPGA implementation of DSP principle & method.)
- 2020-06-17 23:20:01下载
- 积分：1
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50846288C
verilog 硬件编程实现bpsk调制(verilog hardware, programming bpsk Modulation)
- 2009-10-29 20:20:33下载
- 积分：1
