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dec2_4
decoder 2-4
digital core
- 2016-05-20 03:50:28下载
- 积分：1
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tb_modular
说明： Matlab to hdl code for Least_square testbench
- 2020-06-17 12:20:02下载
- 积分：1
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read-string-from-FLASH
read data of type character from flash memory
- 2013-09-08 03:49:15下载
- 积分：1
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edashuzipinlvji
EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计(EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design)
- 2013-04-16 17:00:58下载
- 积分：1
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机器人线跟踪
这是 picoblaze 的线跟踪 bot 程序集代码。
- 2022-03-11 11:37:16下载
- 积分：1
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zidong-shouhuoji
用VERILOG实现自动售货机功能，运行正确，希望有帮助(Use VERILOG implementation vending machine function, correct operation, hope to have help)
- 2014-01-05 20:42:49下载
- 积分：1
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A4_Oscilloscope_Top
数字示波器实验，利用AD、DA和VGA三个外设来实现简易示波器，DA外设发送正弦波给AD外设，AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。(In the experiment of digital oscilloscope, AD, DA and VGA are used to realize simple oscilloscope. DA peripheral transmits sine wave to AD peripheral. AD peripheral resolves into digital signal and sends data to VGA peripheral for display. The waveform, waveform frequency and peak value of DA peripheral can be seen on VGA.)
- 2019-03-13 10:45:10下载
- 积分：1
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交通灯控制系统
基于veilog语言的交通灯控制系统，无左转灯，自制数字电子技术课程设计，仿真通过，由于是多个程序拼接外加本人水平有限，可能结构略有杂乱。
- 2022-08-18 14:49:32下载
- 积分：1
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multi16
有符号16位乘法器。经典booth编码。拓扑结构为wallance树。加法器类型是进位选择加法器。(Number system: 2 s complement
Multiplicand length: 16
Multiplier length: 16
Partial product generation: PPG with Radix-4 modified Booth recoding
Partial product accumulation: Wallace tree
Final stage addition: Carry select adder
)
- 2013-01-01 14:13:58下载
- 积分：1
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altera_fft
verilog实际例子，非常适合初学者学习(verilog practical examples, very suitable for beginners to learn)
- 2020-12-06 16:49:22下载
- 积分：1
