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core_arm.tar
ARM7系统IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。(ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)
- 2021-04-20 00:18:51下载
- 积分:1
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使用fpga进行温控的程序
使用fpga基于积分分离的pid算法进行温控的程序,经实验证明很稳定-Fpga points based on the use of separate pid process temperature control algorithm, the experiment proved to be stable
- 2022-07-07 17:04:57下载
- 积分:1
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FPGA-PID
基于FPGA设计的一个PID控制系统,完成对物体检测和运动控制;直流电机和步进电机驱动模块是可选的。(PID control system based on FPGA: Objection detection, movement control, motor driver is optional)
- 2018-03-08 23:01:30下载
- 积分:1
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FIR 滤波器加速器
Nios II 处理器上运行的 FIR 滤波器加速器
- 2022-01-25 16:42:57下载
- 积分:1
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DDS_signal_genarator
这是一个利用verilog语言编写的信号发生器的例子,值得参考(this is a code about signal generator by VIERILOG LANGUAGE!)
- 2013-12-23 10:12:52下载
- 积分:1
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multi_booth
说明: 基于quartus的布斯乘法器的verilog 实现。布斯乘法算法是计算机中一种利用数的2的补码形式来计算乘法的算法。该算法由安德鲁·唐纳德·布斯于1950 年发明,当时他在伦敦大学伯克贝克学院做晶体学研究。布斯曾使用过台式计算器,由于用这种计算器来做移位计算比加法快,他发明了该算法来加快计算速度。(The verilog codes of booth multiplier based on quartus. Booth multiplication algorithm is a computer algorithm using the complement form of number 2 to calculate the multiplication. The algorithm was invented in 1950 by Andrew Donald booth, who was working on crystallography at birkbeck college, university of London. Booth used a desktop calculator, and because it was faster to do shifts than to add, he invented the algorithm to speed up the calculations.)
- 2019-01-06 10:03:08下载
- 积分:1
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Foundry-Flash-Verilog-code
几大代工厂的flash verilog源代码(flash verilog code)
- 2021-03-09 15:29:28下载
- 积分:1
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FIR_filter
说明: 滤波器就是对特定的频率或者特定频率以外的频率进行消除的电路,被广泛用于通信系统和信号处理系统中。(Filter is a circuit that eliminates specific frequencies or frequencies other than specific frequencies. It is widely used in communication systems and signal processing systems.)
- 2020-06-21 14:00:01下载
- 积分:1
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lpddr2
LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.
- 2015-05-11 20:57:21下载
- 积分:1
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atom.2007.12.tar
Cores are generated from Confluence a modern logic design language. Confluence is a simple, yet highly expressive language that compiles into Verilog, VHDL, and C
- 2008-05-12 10:13:23下载
- 积分:1