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VHDL_freerisc8
说明： 一个8位RiSC单片机的VHDL代码，
具有很好的参考价值。(an eight RiSC SCM VHDL code, is a good reference value.)
- 2006-02-15 10:58:14下载
- 积分：1
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SAR-ADC
Complete Successive approximation Analog to digital converter along with the source code
- 2013-04-21 23:42:03下载
- 积分：1
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VGA 脱开功能为斯巴达
用来代表不同的颜色，在 FPGA 使用斯巴达 3E 板，然后更改使用开关来得到不同的颜色
- 2022-11-08 05:10:03下载
- 积分：1
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前导零CPU
在多周期CPU的基础上设计一个前导0检测程序。(A preamble 0 detection program is designed on the basis of multi period CPU.)
- 2017-10-11 21:26:01下载
- 积分：1
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lcd
1602是目前最常用的显示器件，本例是通过verilog 代码实现1602的显示(1602 display)
- 2011-01-04 14:10:31下载
- 积分：1
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DDS
DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)
- 2007-12-11 16:26:33下载
- 积分：1
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SR_DDS
DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。(DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.)
- 2016-03-20 22:04:51下载
- 积分：1
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LZ77_1
Package include hardware implementation of Lz77 algorithm
- 2021-04-26 10:38:45下载
- 积分：1
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RSA的VHDL代码
Here, we present the first available open-source 512 bit RSA core. This is an early
prototype version of a full FIPS Certified 512-4096 capable RSA Crypto-core which will be on sale
soon. The version provided, has not the same performance than the final product since it was a
proof of concept that we decided to release to the community in order to help small projects which
need RSA ciphering.
- 2022-09-07 05:20:03下载
- 积分：1
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immediate_divide_module
用组合逻辑实现循环除法器。稳定、安全、可靠。(Combinational logic loop divider. Stable, secure, and reliable.)
- 2012-08-30 09:08:04下载
- 积分：1
