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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分：1
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13.3_Tracing
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动跟踪(System Generator based image processing engineering, multimedia processing on FPGA source, video-based motion tracking)
- 2020-11-04 17:39:51下载
- 积分：1
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遥控器接收解码电路
设计遥控器接收解码电路。该电路接收编码后的串行数据，解码输出数据。电路接收
到的串行数据的格式为： 4 位同步码“ 1010”， 4 位数据（高位在前）， 1 位奇校验码（对前 8 位数据校验）(Design of remote control receiver decoding circuit. The circuit receives the encoded serial data and decodes the output data. The format of the serial data received by the circuit is: 4 bit synchronous code "1010", 4 bit data (high in the front), 1 bit parity check code (check for the first 8 bits of data))
- 2017-11-27 15:10:34下载
- 积分：1
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fft_16
基于FPGA用verilog语言实现16点FFT(16-point FFT FPGA-based verilog language)
- 2021-04-18 15:28:51下载
- 积分：1
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xilinx平台DDR3设计教程之仿真篇_中文版教程
DRD3在Xlinix平台上的设计教程以及仿真(DRD3 design tutorial and Simulation on Xlinix platform)
- 2018-11-02 11:18:06下载
- 积分：1
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This project features a full
This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM.
The core acts as a slave WISHBONE device.
The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file.
Compression ratio is fixed for IMA-ADPCM, being 4:1.
PLEASE NOTICE THAT THIS CORE IS LICENSED UNDER http://creativecommons.org/licenses/by-nc-sa/3.0/ (Creative Commons Attribution-Noncommercial-Share Alike 3.0 Unported). That means you may use it only for NON-COMMERCIAL purposes.
- 2022-07-25 20:05:07下载
- 积分：1
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41_eth_ddr3_lcd
说明： “基于 ROM 的 LCD图片显示实验 ”中利用 FPGA 片上存储资源存储图片，并通过 LCD接口将图片显示到 LCD屏幕上。但是由于 FPGA 片上存储资源有限，只能存储分辨率较小的图片(In the experiment of LCD image display based on ROM, FPGA on-chip storage resources are used to store pictures, and the pictures are displayed on LCD screen through LCD interface. However, due to the limited on-chip memory resources of FPGA, it can only store images with smaller resolution)
- 2021-03-21 00:33:00下载
- 积分：1
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具有多种功能的电子钟：闹钟、定时和修改…
具有多种功能的电子钟：闹钟，报时和修改，定时闹钟，报时时间，带闹钟，报时开关。-with multiple functions of electronic bell : alarm clock, timer and modification, regular alarm clock, timer, with alarm clock, timer switches.
- 2022-03-12 23:49:24下载
- 积分：1
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LEDcontrol
fpga控制led灯的闪烁，内容简单，希望对初学者有用.(fpga control led lights flashing, the content is simple, I hope useful. . .)
- 2015-05-05 10:00:11下载
- 积分：1
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en.SPI_EEPROM_Verilog_models_V10
spi接口的eeprom模型，型号为st公司m65pxx(The eeprom model of spi interface is st company m65pxx)
- 2021-01-19 14:28:44下载
- 积分：1
