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Key-200893142940130
说明： 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典(Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure)
- 2008-10-07 18:16:54下载
- 积分：1
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：采用FPGA来实现一个基于OFDM技术的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制器包括：信道编码（Reed...
：采用FPGA来实现一个基于OFDM技术的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制器包括：信道编码（Reed-Solomon编码），交织，星座映射，FFT和插入循环前缀等模块。我另外制作了相应的解调器，可以实现上述功能的逆变换。-: Using FPGA to implement a technology-based OFDM communication systems in base-band data processing part of the modem. One part of the modulator launch include: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and cyclic prefix insertion modules. I also produced a corresponding demodulator can achieve the above-mentioned inverse transform function.
- 2023-05-15 07:15:03下载
- 积分：1
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Clutter-Filtering-
。给出了时域滤波的基本原理以及通常采用的
IIR 椭圆地物杂波滤波器的设计方法。重点研究了回归滤波器这一时域滤波算
法。从正交多项式的拟合出发，给出了回归滤波器抑制地物杂波的基本原理及
其滤波实现过程。通过对回归滤波器的计算复杂度的研究，寻找使回归滤波器
计算量最小的正交多项式。分析了回归滤波器频率响应特性，比较了回归滤波
器与IIR 椭圆地物杂波滤波器的计算复杂度。利用仿真的雷达信号，分析了回
归滤波器的地物杂波抑制性能。回归滤波器实际上是一高通滤波器，它在滤掉
低频地物杂波的同时，对落在滤波器阻带内的天气回波信号同样会造成衰减。
在天气回波信号谱宽固定的情况下，通过改变天气回波信号的平均多普勒频率，
分析了回归滤波器对它的衰减情况。在基于一组实际采集的雷达信号的基础上，
给出了回归滤波器的地物杂波抑制比随着滤波器阶数的变化情况。(Firstly, this dissertation introduces the research background and significance of
ground clutter suppression, analyzes the characteristics of the ground clutter and
weather signals in the Doppler weather radars and simulates Doppler radar echo
signals (It includes ground clutter, weather echo signals and the mixture of them).
The simulated signals are used later to study the time and frequency domain ground
clutter suppression.
Secondly, this dissertation talks about the time domain filtering, gives the basic
theory of time domain filtering and describes the design method of the usually used
fifth-order elliptic infinite impulse response (IIR) ground clutter filter. In the time
domain, the work focuses on the regression filter. From the orthogonal polynomials
fit, this dissertation gives the basic theory of the regression filter for ground clutter
suppression and the filtering process using a regression filter. Through the study of
the computational complexity of regression)
- 2012-07-09 22:12:11下载
- 积分：1
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Noc
说明： credit base network on chip(network on chip (noc))
- 2020-06-19 11:40:02下载
- 积分：1
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VHDL描述的自定义交织器
交织器主要是对输入数据按照一定的规则打乱以便减少数据中过长的连0或者连1的出现。交织矩阵为行列矩阵，msgin为输入比特，msgout为交织输出比特，row和rol为交织器的行和列，可以通过改变col改变交织深度。先把输入的比特流数据改变为一个矩阵，再按照一定的方式输出为比特流数据
- 2022-03-15 22:36:53下载
- 积分：1
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CycloneIIFPGA chip
基于cycloneIIFPGA芯片Ep2c5t144c8的解调程序，用VHDL语言生成-CycloneIIFPGA chip-based demodulation Ep2c5t144c8 procedures, using VHDL language generation
- 2023-05-02 05:35:04下载
- 积分：1
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sample_tcam.tar
verilog RTL code for simple TCAM
- 2014-06-25 15:50:08下载
- 积分：1
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yiweijicunq
16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器，实际具有环形移位的功能，是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时，输入信号的最低位移位到最高位，其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分：1
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xilinx CTC IPcore 误码率测试
xilinx CTC IPcore 误码率测试-xilinx CTC IPcore Bit Error Rate Test
- 2022-07-17 12:20:15下载
- 积分：1
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用Verilog做的SD卡控制器(有详细的注释)
说明： SDIO 接口，实现SD卡的控制器功能，带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分：1
