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sb133
Based on SVPWM three-level inverter matlab simulation, It describes the application of load forecasting, EULER numerical analysis method.
- 2017-08-28 20:49:27下载
- 积分：1
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CORDIC 代码
Xilinx CORDIC 算法 MATLAB Verilog仿真(arctan.m Kn.m sin_cos.m MATLAB Verilog)
- 2019-03-27 09:53:35下载
- 积分：1
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This is the design of the divider module EDA. Can achieve three different freque...
此为EDA设计的分频器模块。可以实现三种不同的频率信号，可以通过使用者自由设置频率大小-This is the design of the divider module EDA. Can achieve three different frequency signals, users can freely set the frequency of the size of
- 2022-07-22 16:48:57下载
- 积分：1
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VHDL
用VHDL语言实现一Mealy型时序电路，并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)
- 2014-03-20 14:44:28下载
- 积分：1
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这是一个FIR低通滤波器，以
一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.
- 2022-04-29 09:43:31下载
- 积分：1
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decodeLogDomainSimple
When the initial input falls between the Switch off point and Switch on point values, the initial output is the value when the relay is off.
- 2017-01-29 18:04:53下载
- 积分：1
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masera2017
fpga hardware hevc implementation
- 2018-08-06 01:26:57下载
- 积分：1
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Verilog HDL 135例指南：Verilog HDL语言类似于C语言，以…
verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，3-6章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 3-6
- 2022-09-27 03:05:03下载
- 积分：1
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20080931
Design approach for VHDL and FPGA Implementation of
Automotive Black Box using CAN Protocol
- 2009-10-23 00:20:47下载
- 积分：1
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Four-controllable-counter
说明： 功能是（用Verilog语言的，内有比较详细的注释）：
（1）计数器的功能是从0到9999计数，并能以十进制数的形式在七段数码管上显示出来(包括七段数码管显示模块).
（2）该计数器有一个1个nclr和一个adj_plus端，在控制信号的作用下（见下表），计数器具有复位、增或减计数、暂停的功能。编写以上的程序的完整模块.
计数器的功能表
nclr adj_minus 功 能
0 0 复位为0
0 1 递增计数
1 0 递减计数
1 1 暂停计数
(Function is (with Verilog language, the more detailed comments): (1) counter function is from 0 to 9999 counts, and are able to form a decimal number on the seven-segment LED display (including the seven-segment LED display module). (2) The counter has a one nclr and a adj_plus side, under the action of the control signal (see below), the counter has reset, increase or decrease of count pause function. Complete the preparation of the above program modules. Counter function menu nclr adj_minus reset 0 0 0 0 1 1 0 counts counting suspended Count 1 1)
- 2011-03-01 22:47:51下载
- 积分：1
