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costas
matlab科斯塔斯环的仿真,有波形,很实用的程序(matlab costas m programm)
- 2017-06-17 09:08:11下载
- 积分:1
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fifo
高速FIFO,verilog设计。速度高达130Mhz(High-speed FIFO, verilog design. Speed up to 130MHz)
- 2007-08-22 10:48:45下载
- 积分:1
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Frequency-measurement
频率计,测量频率。可测范围为100HZ至60khz.测量比较稳定。基于MSPg2553(Frequency meter, measuring frequency. Measurable range 100HZ to 60khz. Stable measurement)
- 2012-08-22 11:59:22下载
- 积分:1
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Matlab-and-Modelsim
matlab怎么把数据输入到modelsim,文件读写的问题(data write and read from matlab to modelsim)
- 2013-03-14 15:27:11下载
- 积分:1
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cic_dec_8_five
CIC抽取滤波器,抽取系数8,verilog版本,用于数字下变频(CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion)
- 2010-03-02 12:53:31下载
- 积分:1
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本文为verilog的源代码
本文为verilog的源代码-In this paper, the source code for Verilog
- 2022-01-24 19:02:52下载
- 积分:1
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I2C总线111
说明: 此程序为调试通过的程序,带有I2C总线功能的程序.(this procedure through the debugging process, with I2C bus function procedures.)
- 2005-11-05 13:51:27下载
- 积分:1
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利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信 BLUE
利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信。使用支持蓝牙 4.0 的手机与板卡上的蓝牙模块建立连接,并且通过手机 APP 发送命令,控制 FPGA 板卡上的硬件外设。(The Bluetooth module on the EGO1 digital-analog mixed pocket experimental platform is used to communicate with the board. The Bluetooth 4.0-enabled mobile phone is used to establish a connection with the Bluetooth module on the board, and commands are sent through the mobile phone APP to control the hardware peripherals on the FPGA board.)
- 2020-06-24 02:00:02下载
- 积分:1
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几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码
几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码-several VHDL source code, and in my preparation of a five pipelined RISC CPU code
- 2023-05-10 01:55:03下载
- 积分:1
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这是一个GPIB源程序代码,里面有硬件相对应的代码
这是一个GPIB源程序代码,里面有硬件相对应的代码-This is a GPIB source code, which corresponds to a hardware code
- 2022-02-15 23:31:46下载
- 积分:1