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VHDL_COUNTING 时间使用按钮 (Đếm giờ phút giây sử dụng nút nhấn)
VHDL_COUNTING 时间使用按钮 (Đếm giờ phút giây sử dụng nút nhấn)
- 2022-01-27 10:40:51下载
- 积分:1
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TSL1401_CCD_Test
十分基础的CCD的测试程序,大家可以下载调试CCD(this is a ccd test chengxu ,it is very good to use ,you can down it )
- 2016-03-14 16:50:18下载
- 积分:1
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自己写得一个关于sine(32X24)的程序
自己写得一个关于sine(32X24)的程序-own written on a sine (32X24) procedures
- 2022-02-28 22:21:58下载
- 积分:1
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verilog中调用门级电路的实验程序,实现了门级舰模
verilog中调用门级电路的实验程序,实现了门级舰模-call Verilog gate-level circuit of the experimental procedures, to achieve a gate-level ship-mode
- 2022-10-03 09:10:04下载
- 积分:1
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54948739-Digital-Signal-Processing-With-Field-Pro
I am in need of some codes of HDL
- 2014-02-10 22:18:48下载
- 积分:1
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Quartus a complete design examples, examples from installation to completion, th...
quartus一个完整的设计例子,从安装到实例完成,仿真等全过程,适合从0开始的初学者-Quartus a complete design examples, examples from installation to completion, the entire process of simulation, etc., suitable for the beginner to start from 0
- 2022-07-26 09:40:40下载
- 积分:1
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VHDL_to_UART
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。()
- 2007-08-09 09:54:40下载
- 积分:1
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Interpolation-in-Digital-Modems
Farrow 滤波器设计经典文章,作者是:FM.Gardner,farrow滤波器设计的始祖,经典值得推荐!(两篇文章)(Farrow filter design classic article, the author is: FM.Gardner, farrow filter design ancestor, classic worth recommending! (Two articles))
- 2013-11-15 17:57:22下载
- 积分:1
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各种加法器的 vhdl 代码
下面是各种文件,有 vhdl 代码和进位保留加法器的验证平台,进行超前进位加法器,等等。综合和代码已经模拟了。
给出的所有加法器是 16 位加法器,并实施新思科技。
- 2022-03-07 01:53:22下载
- 积分:1
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004
51单片机的下载器PCB图,可以用于at89cXX和at89c0xx系列的单片机的程序烧录,简单好用!使用proteus画的板。(51 MCU PCB map downloader, can be used at89cXX and procedures for microcontroller series at89c0xx burning, easy to use! Drawing board with proteus.)
- 2011-10-26 11:03:40下载
- 积分:1