▍1. myedma
利用DM642实现一个初级的EDMA例程,希望对你学习DSP有帮助(DM642 a primary EDMA routine, you want to learn DSP)
利用DM642实现一个初级的EDMA例程,希望对你学习DSP有帮助(DM642 a primary EDMA routine, you want to learn DSP)
在VDSP开发环境中,用C语言使用迭代法产生正弦波(VDSP development environment with C language using the iterative method generates a sine wave)
Principles of Digital Communication
给出了基于软件环境PE—PSpice的电路设计源码。同通过了顺利的测试运行(Introduce the software of electrical PE-pspice and verify the efffectness of the proposed code)
mutual interference in cognitive radio
TI公司的DSP芯片TMS320f28335的最新官方中文手册。(TI' s DSP chip TMS320f28335 latest official Chinese manual.)
TI DSP TMS320F2812, 定时器实例,基于C语言,开发环境是code composer studio(TI TMS320F2812 DSP, the timer instance, based on C language development environment is code composer studio)
TMS320F283XX 快速浮点库源程序(TMS320F283XX fast floating-point library source code)
DSP的Vector生成,TI的DSP2407有6个通道的Vector输出,写了一个Vector生成的程序。希望大家有用。2407很简单一起学习。(Vector of DSP)
CCS 开发环境下 EMIF接口上的SDRAM 测试程序(SDRAM test program for DM64X on EMIF interface in CCS)
一个信号信息处理调理电路,有放大电路和滤波电路构成的功能。(Information processing of a signal conditioning circuit, amplifier and filter circuit consisting of function. )
基于双环控制的三相SVPWM逆变器研究,基于双环控制的三相SVPWM逆变器研究(Based on double-loop three-phase SVPWM inverter control study, based on double-loop control of three-phase SVPWM Inverter)
使用飞思卡尔DSP8037的风光互补发电可控升压整流电路原理图与PCB图(Use of wind and solar power generation Freescale DSP8037 controlled boost rectifier circuit schematic diagram and PCB)
传统的DSP 控制通常针对的是三相系统,其外设资源不能满足多相逆变器的控制要求,文中 提出一种DSP + FPGA 的控制器解决方案. 特别利用了FPGA 逻辑资源丰富,编程灵活的特点,设 计了译码电路、脉冲发生、串口通信、看门狗保护、硬件状态锁存等功能单元,在有效扩展系统功能 的同时,降低了运算单元的负荷,提高了整体性能. 对设计进行了时序仿真,并将其应用于8 MW逆变器的控制系统中,结果验证了设计方案的功能性与可靠性.(Traditional DSP control is usually targeted at three-phase system, its peripherals resources can not meet the requirements of multi-phase inverter control, the paper presents a DSP+ FPGA controller solutions, especially the use of the FPGA logic resource-rich, flexible programming characteristics, the design of the decoding circuit, pulse, serial communication, watchdog protection, hardware, latches and other functional unit state, the effective expansion of system functions, while reducing the computing unit load, improve the overall performance of the design for timing simulation, and applied to 8 MW inverter control system, the results validate the design' s functionality and reliability.)