pcm

代码说明：

  利用VHDL语言和模块化设计实现PCM编译码的功能，整体工程和代码全有。(PCM encode and decode by VHDL in Quartus2. )

文件列表：

shiyan\sy1.qpf
shiyan\sy1.qsf
shiyan\db\sy1.db_info
shiyan\db\sy1.sld_design_entry.sci
shiyan\db\sy1.cmp.rdb
shiyan\db\sy1.eda.qmsg
shiyan\db\sy1.rtlv.hdb
shiyan\db\sy1.asm.qmsg
shiyan\db\sy1.map.logdb
shiyan\db\sy1.tan.qmsg
shiyan\db\sy1.map.cdb
shiyan\db\sy1_cmp.qrpt
shiyan\db\sy1.cbx.xml
shiyan\db\sy1.hif
shiyan\db\sy1.map.qmsg
shiyan\db\sy1.eco.cdb
shiyan\db\sy1.fit.qmsg
shiyan\db\sy1.map.hdb
shiyan\db\sy1.hier_info
shiyan\db\sy1.cmp.logdb
shiyan\db\sy1.fnsim.hdb
shiyan\db\sy1.sim.qmsg
shiyan\db\sy1.sim.vwf
shiyan\db\sy1.rtlv_sg.cdb
shiyan\db\sy1.psp
shiyan\db\sy1.rtlv_sg_swap.cdb
shiyan\db\sy1.pre_map.hdb
shiyan\db\sy1.pre_map.cdb
shiyan\db\sy1.syn_hier_info
shiyan\db\sy1.sgdiff.cdb
shiyan\db\sy1.sgdiff.hdb
shiyan\db\sy1.sim.rdb
shiyan\db\sy1.sim.hdb
shiyan\db\sy1.cmp0.ddb
shiyan\db\sy1.cmp.cdb
shiyan\db\sy1.signalprobe.cdb
shiyan\db\sy1.cmp.hdb
shiyan\db\sy1.cmp.tdb
shiyan\db\sy1.fnsim.cdb
shiyan\db\sy1.sld_design_entry_dsc.sci
shiyan\db\add_sub_5sh.tdf
shiyan\db\mux_vgc.tdf
shiyan\db\mux_sgc.tdf
shiyan\db\add_sub_1sh.tdf
shiyan\db\add_sub_gth.tdf
shiyan\db\add_sub_tph.tdf
shiyan\db\add_sub_4sh.tdf
shiyan\db\add_sub_sph.tdf
shiyan\db\add_sub_3sh.tdf
shiyan\db\add_sub_rph.tdf
shiyan\db\add_sub_2sh.tdf
shiyan\db\add_sub_qph.tdf
shiyan\db\add_sub_ioh.tdf
shiyan\db\add_sub_0sh.tdf
shiyan\db\add_sub_hoh.tdf
shiyan\db\sy1.eds_overflow
shiyan\db\sy1_sim.qrpt
shiyan\db\add_sub_f0h.tdf
shiyan\db\add_sub_g0h.tdf
shiyan\fenpin.bsf
shiyan\address.bsf
shiyan\address.vhd
shiyan\pcmdecoder.bsf
shiyan\pcmdecoder.vhd
shiyan\pcmencoder.bsf
shiyan\pcmencoder.vhd
shiyan\piso8.bsf
shiyan\piso8.vhd
shiyan\rom.bsf
shiyan\rom.vhd
shiyan\sy1.bdf
shiyan\sy1.map.eqn
shiyan\sy1.map.rpt
shiyan\sy1.flow.rpt
shiyan\sy1.map.summary
shiyan\sy1.fit.eqn
shiyan\sy1.pin
shiyan\sy1.fit.rpt
shiyan\sy1.fit.summary
shiyan\sy1.sof
shiyan\sy1.pof
shiyan\sy1.asm.rpt
shiyan\sy1.tan.summary
shiyan\sy1.tan.rpt
shiyan\simulation\modelsim\sy1_modelsim.xrf
shiyan\simulation\modelsim\sy1.vho
shiyan\simulation\modelsim\sy1_vhd.sdo
shiyan\timing\primetime\sy1.vho
shiyan\timing\primetime\sy1_vhd.sdo
shiyan\timing\primetime\sy1_pt_vhd.tcl
shiyan\sy1.eda.rpt
shiyan\sy1.done
shiyan\sy1.vwf
shiyan\sy1.sim.rpt
shiyan\sy1.qws
shiyan\cmp_state.ini
shiyan\fenpin.vhd
shiyan\sy1.bsf
shiyan\simulation\modelsim
shiyan\timing\primetime