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crc

于 2014-11-23 发布 文件大小:292KB
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  CRC循环冗余校验是数字数据通信中最常用的差错控制编码方法之一。在多种通信协议的帧结构中有一个 16位或32位的FCS(FrameCheekSequenee),就是利用CRC编码保证数据帧的无误传输。本文阐述7CRC循环 冗余校验码基本原理,根据实际系统需要,建立了并行处理算法的数学模型,并且在F尸GA芯片中实现了该并行算法。 (the resource of matlab)

文件列表:

CRC FPGA.caj,225351,2014-11-23

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