dpd_v6_0_example_design

代码说明：

  xilink DPD V6.0 IP Core design example

文件列表：

dpd_v6_0_example_design
.......................\dfe_base.prj,5110,2012-10-17
.......................\dfe_base.vhd,53810,2012-10-25
.......................\dpd_v6_0_demo_msdpdgen1p5.cgp,515,2012-10-15
.......................\dpd_v6_0_demo_msdpdgen1p5.ucf,46485,2012-10-16
.......................\dpd_v6_0_demo_msdpdgen1p5.xst,1048,2012-10-15
.......................\dpd_v6_0_inst.xco,1465,2012-10-15
.......................\iter6_pc_cfr_v3_0.xco,1944,2012-10-24
.......................\Makefile,4143,2012-10-15
.......................\src
.......................\...\clk_gen
.......................\...\.......\hdl
.......................\...\.......\...\clk_gen_src368mhz.vhd,8728,2012-10-15
.......................\...\.......\...\data_path_clk_gen_src200mhz.vhd,8857,2012-10-15
.......................\...\.......\...\proc_clk_gen_src200mhz.vhd,8603,2012-10-15
.......................\...\device
.......................\...\......\common
.......................\...\......\......\hdl
.......................\...\......\......\...\dfe_capture_control.vhd,9075,2012-10-15
.......................\...\......\......\...\dfe_complex_fir.vhd,7377,2012-06-04
.......................\...\......\......\...\dfe_complex_fir_x0x1_h0.vhd,5647,2012-10-15
.......................\...\......\......\...\dfe_complex_fir_x0_h0h1.vhd,5657,2012-10-15
.......................\...\......\......\...\dfe_config_registers.vhd,3675,2012-10-17
.......................\...\......\......\...\dfe_dlb.vhd,9276,2012-07-03
.......................\...\......\......\...\dfe_dlb_wrapper.vhd,7593,2012-07-03
.......................\...\......\......\...\dfe_dpram_piped_rtl.vhd,10039,2012-10-04
.......................\...\......\......\...\dfe_fh_gen_adder_12x16bit.vhd,7121,2012-10-15
.......................\...\......\......\...\dfe_fh_gen_adder_3x48bit.vhd,13344,2012-10-15
.......................\...\......\......\...\dfe_gain_iq_mult.vhd,4707,2012-06-04
.......................\...\......\......\...\dfe_generic_equalizer.vhd,6127,2012-06-04
.......................\...\......\......\...\dfe_glitch_protection.vhd,8472,2012-06-04
.......................\...\......\......\...\dfe_pipeliner.vhd,3694,2012-08-10
.......................\...\......\......\...\dfe_polyphase_complex_fir.vhd,12434,2012-06-04
.......................\...\......\......\...\dfe_rate_change.vhd,6933,2012-06-08
.......................\...\......\......\...\dfe_systolic_fir.vhd,5253,2012-06-04
.......................\...\......\......\...\dfe_systolic_fir_preadd_coeffs.vhd,6719,2012-06-04
.......................\...\......\......\...\dfe_systolic_fir_preadd_data.vhd,6547,2012-06-04
.......................\...\......\......\...\dfe_up2.vhd,6126,2012-10-15
.......................\...\......\......\...\dfe_up3_dn2.vhd,14356,2012-10-15
.......................\...\......\......\...\dfe_up3_dn2_polyphase.vhd,16708,2012-10-15
.......................\...\......\......\...\dfe_up3_dn2_polyphase_2x2.vhd,9282,2012-10-15
.......................\...\......\......\...\dfe_up3_dn2_polyphase_test.vhd,21691,2012-10-15
.......................\...\......\......\...\dpd_dpram.vhd,14864,2012-10-15
.......................\...\......\virtex6
.......................\...\......\.......\generic
.......................\...\......\.......\.......\netlist
.......................\...\......\.......\.......\.......\adc_fifo_buffer_8kx12b.ngc,35425,2012-10-15
.......................\...\......\.......\.......\.......\fifo_16.ngc,121393,2012-10-15
.......................\...\......\.......\.......\.......\fifo_32bit.ngc,61743,2012-10-15
.......................\...\......\.......\.......\.......\fifo_48_192.ngc,126600,2012-10-15
.......................\...\......\.......\.......\.......\ml605_demo_dlb_complex_mult.ngc,77682,2012-10-15
.......................\...\......\.......\.......\.......\srx_fifo_dmux.ngc,52224,2011-11-14
.......................\...\......\.......\.......\.......\up2_245_sharp.ngc,630980,2012-10-15
.......................\...\......\.......\.......\.......\up3dn2_79taps_2x.ngc,756803,2012-10-15
.......................\...\......\.......\.......\.......\up3dn2_79taps_parallel_2.ngc,532186,2012-10-15
.......................\...\......\.......\.......\.......\up3dn2_79taps_parallel_3.ngc,532186,2012-10-15
.......................\...\......\.......\jtag
.......................\...\......\.......\....\netlist
.......................\...\......\.......\....\.......\jtagcosim_shmem.ngc,292549,2012-10-15
.......................\...\......\.......\pc_cfr
.......................\...\......\.......\......\hdl
.......................\...\......\.......\......\...\dfe_cfr_wrapper.vhd,12514,2012-06-06
.......................\...\dpd_v6_0
.......................\...\........\debug_if
.......................\...\........\........\create_wrapper.pl,8024,2012-10-15
.......................\...\........\........\debug_interface.vhd,9220,2012-10-15
.......................\...\........\........\dpd_debug_wrapper.vht,9010,2012-10-15
.......................\...\........\hdl
.......................\...\........\...\dpd_cordic_abs.vhd,7652,2012-06-04
.......................\...\........\...\dpd_dpram.vhd,14863,2012-06-04
.......................\...\........\...\dpd_qmc.vhd,9746,2012-06-04
.......................\...\package
.......................\...\.......\hdl
.......................\...\.......\...\dfe_base_pkg.vhd,7589,2012-10-25
.......................\...\.......\...\dfe_component_pkg.vhd,7277,2012-10-15
.......................\...\platform
.......................\...\........\kc705
.......................\...\........\.....\ddr
.......................\...\........\.....\...\hdl
.......................\...\........\.....\...\...\dfe_kc705_ddr_controller.vhd,40432,2012-10-15
.......................\...\........\.....\...\mig_v1_4
.......................\...\........\.....\...\........\clocking
.......................\...\........\.....\...\........\........\clk_ibuf.v,4449,2012-10-15
.......................\...\........\.....\...\........\........\infrastructure.v,13556,2012-10-15
.......................\...\........\.....\...\........\........\iodelay_ctrl.v,7752,2012-10-15
.......................\...\........\.....\...\........\........\iodelay_ctrl_old.v,7886,2012-10-15
.......................\...\........\.....\...\........\controller
.......................\...\........\.....\...\........\..........\arb_mux.v,18938,2012-10-15
.......................\...\........\.....\...\........\..........\arb_row_col.v,18483,2012-10-15
.......................\...\........\.....\...\........\..........\arb_select.v,23946,2012-10-15
.......................\...\........\.....\...\........\..........\bank_cntrl.v,25385,2012-10-15
.......................\...\........\.....\...\........\..........\bank_common.v,17893,2012-10-15
.......................\...\........\.....\...\........\..........\bank_compare.v,10872,2012-10-15
.......................\...\........\.....\...\........\..........\bank_mach.v,30385,2012-10-15
.......................\...\........\.....\...\........\..........\bank_queue.v,22597,2012-10-15
.......................\...\........\.....\...\........\..........\bank_state.v,36171,2012-10-15
.......................\...\........\.....\...\........\..........\col_mach.v,16371,2012-10-15
.......................\...\........\.....\...\........\..........\mc.v,39120,2012-10-15
.......................\...\........\.....\...\........\..........\rank_cntrl.v,21086,2012-10-15
.......................\...\........\.....\...\........\..........\rank_common.v,19693,2012-10-15