登录
首页 » VHDL » srio

srio

于 2017-07-09 发布 文件大小:2145KB
0 214
下载积分: 1 下载次数: 45

代码说明:

  fpga平台实现srio通信,以及srio端口寄存器设计。(FPGA platform to achieve sRIO communication, as well as sRIO port register design.)

文件列表:

mnl_avalon_spec.pdf
sys_mnt_m.v
sys_mnt_m.zip
ug_rapidio.pdf

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 16bit-multiplier
    实现verilog16位乘法器,verilog新手(achieve 16-bit multiplier)
    2021-04-01 21:09:08下载
    积分:1
  • AXI-HP-PDMAPGIC
    本文参考了Xilinx 官方文档UG873,“System Design Using Processing System High Performance Slave Port”。主要实现了PL 中AXI CDMA IP 与PS 部分HP64bit 从接口集成。 本例中AXI CDMA 部分扮演主机,从PS 部分DDR 系统内存中源缓冲区拷贝一列数据到目 的缓冲区。可以分别采用裸机工程和基于Linux 的应用软件来实现功能。(This reference to the official document Xilinx UG873, " System Design Using Processing System High Performance Slave Port" . The main achievement of the PL in AXI CDMA IP interface integration with PS part HP64bit. In this example AXI CDMA part to play host, a copy of a column of data into the destination buffer section PS source DDR system memory buffer. Can respectively bare engineering and Linux-based applications to achieve functional.)
    2014-12-23 10:27:24下载
    积分:1
  • Altium_Package_LMH0340
    Altium Reference design for LMH0340 test bed and design
    2013-05-11 04:21:35下载
    积分:1
  • bluedemo.tar
    大气的移动互联网模板,支持ipad,iphone,android(a mobile theme demo)
    2013-06-23 09:20:25下载
    积分:1
  • Interpolation-in-Digital-Modems
    Farrow 滤波器设计经典文章,作者是:FM.Gardner,farrow滤波器设计的始祖,经典值得推荐!(两篇文章)(Farrow filter design classic article, the author is: FM.Gardner, farrow filter design ancestor, classic worth recommending! (Two articles))
    2013-11-15 17:57:22下载
    积分:1
  • led1
    说明:  点亮led流水灯,通过调用锁相环,可以更改对应的时钟。(Lighting the LED pipelining lamp, the corresponding clock can be changed by calling the phase-locked loop.)
    2020-06-16 07:00:01下载
    积分:1
  • docuyeotation_documentation
    WDM driver development documentation
    2019-04-20 22:56:58下载
    积分:1
  • QSPI_FLASH_MODEL
    说明:  QSPI_FLASH_MODEL 可以设计时前端仿真使用(QSPI?_Flash_Model can be used in front-end simulation at design time)
    2019-12-25 15:12:50下载
    积分:1
  • src
    说明:  实现UDP的网络传输,在PC建立UDP的服务器,向fpga的ip:192.168.0.25发送数据,实现回环通讯。(The network transmission of UDP is realized. UDP server is set up in PC, and the data is sent to IP: 192.168.0.25 of FPGA to realize loop communication.)
    2020-09-05 20:39:29下载
    积分:1
  • codings
    wavelet transform of a signal,it is important and useful code to trans form frequency to time domain
    2013-11-10 15:10:32下载
    积分:1
  • 696518资源总数
  • 105547会员总数
  • 4今日下载