前导零CPU

代码说明：

  在多周期CPU的基础上设计一个前导0检测程序。(A preamble 0 detection program is designed on the basis of multi period CPU.)

文件列表：

multi_cpu
multi_cpu\.lso
multi_cpu\add32.v
multi_cpu\adder_8bits.v
multi_cpu\ALU.v
multi_cpu\ALU_partunit.v
multi_cpu\ALU_partunit_stx_beh.prj
multi_cpu\ALU_summary.html
multi_cpu\booth.v
multi_cpu\code.dat
multi_cpu\control.v
multi_cpu\controller.v
multi_cpu\controller_summary.html
multi_cpu\cpu.ucf
multi_cpu\cpu_tb.v
multi_cpu\cpu_tb_isim_beh.exe
multi_cpu\cpu_tb_isim_beh1.wdb
multi_cpu\cpu_tb_stx_beh.prj
multi_cpu\cpu_top.bgn
multi_cpu\cpu_top.bit
multi_cpu\cpu_top.bld
multi_cpu\cpu_top.cmd_log
multi_cpu\cpu_top.drc
multi_cpu\cpu_top.lso
multi_cpu\cpu_top.ncd
multi_cpu\cpu_top.ngc
multi_cpu\cpu_top.ngd
multi_cpu\cpu_top.ngr
multi_cpu\cpu_top.pad
multi_cpu\cpu_top.par
multi_cpu\cpu_top.pcf
multi_cpu\cpu_top.prj
multi_cpu\cpu_top.ptwx
multi_cpu\cpu_top.stx
multi_cpu\cpu_top.syr
multi_cpu\cpu_top.twr
multi_cpu\cpu_top.twx
multi_cpu\cpu_top.unroutes
multi_cpu\cpu_top.ut
multi_cpu\cpu_top.v
multi_cpu\cpu_top.xpi
multi_cpu\cpu_top.xst
multi_cpu\cpu_top_bitgen.xwbt
multi_cpu\cpu_top_envsettings.html
multi_cpu\cpu_top_guide.ncd
multi_cpu\cpu_top_map.map
multi_cpu\cpu_top_map.mrp
multi_cpu\cpu_top_map.ncd
multi_cpu\cpu_top_map.ngm
multi_cpu\cpu_top_map.xrpt
multi_cpu\cpu_top_ngdbuild.xrpt
multi_cpu\cpu_top_pad.csv
multi_cpu\cpu_top_pad.txt
multi_cpu\cpu_top_par.xrpt
multi_cpu\cpu_top_stx_beh.prj
multi_cpu\cpu_top_summary.html
multi_cpu\cpu_top_summary.xml
multi_cpu\cpu_top_usage.xml
multi_cpu\cpu_top_xst.xrpt
multi_cpu\fuse.log
multi_cpu\fuse.xmsgs
multi_cpu\fuseRelaunch.cmd
multi_cpu\IR.v
multi_cpu\iseconfig
multi_cpu\iseconfig\ALU.xreport
multi_cpu\iseconfig\controller.xreport
multi_cpu\iseconfig\cpu_top.xreport
multi_cpu\iseconfig\multi_cpu.projectmgr
multi_cpu\isim
multi_cpu\isim.cmd
multi_cpu\isim.log
multi_cpu\isim\cpu_tb_isim_beh.exe.sim
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\cpu_tb_isim_beh.exe
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\isimcrash.log
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\ISimEngine-DesignHierarchy.dbg
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\isimkernel.log
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\libPortability.dll
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\netId.dat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\tmp_save
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\tmp_save\_1
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\cpu_tb_isim_beh.exe_main.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\cpu_tb_isim_beh.exe_main.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000031846961_0579102447.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000031846961_0579102447.didat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000031846961_0579102447.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000163443182_1912994691.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000163443182_1912994691.didat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000163443182_1912994691.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000343546277_0317258561.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000343546277_0317258561.didat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000343546277_0317258561.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000539143876_4024884307.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000539143876_4024884307.didat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000539143876_4024884307.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000675153136_2340925850.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000675153136_2340925850.didat
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000000675153136_2340925850.nt64.obj
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000001392705559_3385901664.c
multi_cpu\isim\cpu_tb_isim_beh.exe.sim\work\m_00000000001392705559_3385901664.didat