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PennState_III-V_TFET_VA_Model_1.0.1

于 2017-05-30 发布 文件大小:1781KB
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  //VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu

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  • MicroElectronic Circuit Design
    微电子电路设计第五版,Richard C. Jaeger, Traveis N. Blalock编著。FIETH EDITIONMICROELECTRONICHM-M- CIRCUIT DESIGNRICHARD C. JAEGERAuburn UniversityTRAVIS N. BLALOCKUniversity of VirginiaMcGrawEducationGrawEducationMICROELECTRONIC CIRCUIT DESIGN. FIFTH EDITIOPublished by McGraw-Hill Education, 2 Penn Plaza, New York, NY 10121 CopyrightC 2016 by McGraw-Hill EducationAll rights reserved. Printed in the United States of America. Previous editions 2011, 2008, and 2004. No part of thispublication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system,without the prior written consent of McGraw-Hill Education, including, but not limited to, in any network or otherelectronic storage or transmission, or broadcast for distance learninSome ancillaries, including electronic and print components, may not be available to customers outside the United StatesThis book is printed on acid-free pape1234567890DOw/DOw1098765ISBN978-0-07-352960-8MHID0-07-352960-5sident Products markets Kurt LVice President, General Manager, Products Markets: Marty Langece President, Content Design Delivery: Kimberly Meriwether DavidManaging director: Thomas TimpGlobal Publisher Raghu srinivasanDirector. Prodrelopment: RoDirector, Digital Content Development: Thomas Scaife, Ph DProduct develoVincent brashMarketing manager: Nick Mc faddenDirector, Content Design Delivery: Linda avenariusProgram meSchillingContent Project Managers: Jane Mohr, Tammy Juran, and Sandra M. SchneeBuyer: Jennifer PickelDesign: Studio Montage, St Louis, MOContent Licensing Specialist: DeAnna DausenerCompositor: MPS LimitedPrinter.R. DonnellAll credits appearing on page or at the end of the book are considered to be an extension of the copyright pageLibrary of Congress Cataloging-in-Publication DataJaeger. Richard cMicroelectronic circuit design/Richard C. Jaeger, Auburn University,Travis N. Blalock, University of Virginia. --Fifth editionpages cmIncludes bibliographical references and indexISBN978-0-07-352960-8(alk. paper)-ISBN0-07-338045-8(alk. paper)d 1. Integrated circuits--Design and construction. 2. Semiconductors--Design and construction. 3. Electronic circuitesign. I. Blalock, Travis N. Il. TitleTK7874.J3332015621.3815-dc232014040020The Internet addresses listed in the text were accurate at the time of publication. The inclusion of a website does not indicatean endorsement by the authors or McGraw-Hill Education, and McGraw-Hill Education does not guarantee the accuracy ofthe information presented at these siteswww.mhhe.comTOTo Joan, my loving wife and life long partnerRichard C. JaegerIn memory of my father, Professor Theron vaughnBlalock, an inspiration to me and to the countlessstudents whom he mentored both in electronicdesign and in life.Travis n blalockBRIEF CONTENTSPreface xxChapter-by-Chapter Summary XXV12 Operational Amplifier Applications 685PART ONE13 Small-Signal Modeling and LinearSOLID-STATE ELECTRONICS AND DEVICESAmplification 77014 Single-Transistor Amplifiers 8411 Introduction to Electronics 32 Solid-State Electronics 4115 Differential Amplifiers and Operational Amplifier3 Solid-state Diodes and Diode circuits 72Design 9524 Field-Effect Transistors 14416 Analog Integrated Circuit Design Techniques 10315 Bipolar Junction Transistors 21517 Amplifier Frequency Response 111318 Transistor Feedback Amplifiers andPART TWOOscillators 1217DIGITAL ELECTRONICSAPPENDICES6 Introduction to Digital Electronics 2837 Complementary MOS (CMOS) Logic Design 359A Standard Discrete Component Values 12918 MOS Memory Circuits 414B Solid-State Device Models and sPIce simulationParameters 12949 Bipolar Logic Circuits 455C TWo-Port Review 1299PART THREIndex 1303ANALOG ELECTRONICS10 Analog Systems and Ideal OperationalAmplifiers 51711 Nonideal Operational Amplifiers and FeedbackAmplifier Stability 587CONTENTSPreface xxCHAPTER 2Chapter-by-Chapter Summary XXVSOLID-STATE ELECTRONICS 41PART ONE2.1 Solid-State Electronic materials 432.2 Covalent bond model 44SOLID-STATE ELECTRONICS2.3 Drift Currents and mobility inAND DEVICES 1Semiconductors 472.3.1 Drift Currents 47CHAPTER 12.3.2 Mobility 48INTRODUCTION TO ELECTRONICS 32.3.3 Velocity Saturation 482.4 Resistivity of Intrinsic Silicon 491.1 A Brief History of Electronics: From2.5 Impurities in Semiconductors 50Vacuum Tubes to Giga-Scale Integration 52.5.1 Donor Impurities in silicon 511.2 Classification of Electronic Signals 82.5.2 Acceptor Impurities in Silicon 511.2.1 Digital signals 92.6 Electron and hole concentrations in1.2.2 Analog Signals 9Doped semiconductors 511.2.3 A/D and D/A Converters--Bridging2.6.1Type Material (ND >NA)52the analog and Digital2.6.2 p-Type Material (N,A>ND)53Domains 102.7 Mobility and Resistivity in Doped1.3 Notational conventions 12Semiconductors 541.4 Problem-Solving Approach 132.8 Diffusion currents 581.5 Important Concepts from Circuit2. 9 Total Current 59Theory 152.10 Energy Band Model 601.5.1 Voltage and current Division 152.10.1 Electron-Hole pair generation in1.5.2 Thevenin and norton circuitan intrinsic semiconductor 60Representations 162.10.2 Energy Band Model for a Doped1.6 Frequency Spectrum of ElectronicSemiconductor 61Signals 212.10.3 Compensated semiconductors 611.7 Amplifiers 222.11 Overview of Integrated circuit1.7.1 Ideal operational amplifiers 23Fabrication 631.7.2 Amplifier Frequency Response 25Summary 661.8 Element Variations in Circuit Design 26Key Terms 671.8.1 Mathematical modeling ofReference 68Tolerances 26Additional Reading 681.8.2 Worst-Case Analysis 27Problems 688.3 Monte Carlo analysis 291.8.4 Temperature Coefficients 32CHAPTER 31.9 Numeric Precision 34SOLID-STATE DIODES AND DIODE CIRCUITS 72Summary 34Key Terms 353.1 The pn Junction Diode 73References 363.1.1 pn Junction Electrostatics 73Additional Reading 363.1.2 nternal diode currents 77Problems 363.2 The i-v Characteristics of the diode 78VIllContents3.3 The Diode Equation: A Mathematica3.15 Full-Wave Bridge Rectification 123Model for the diode 803.16 Rectifier Comparison and Design3.4 Diode Characteristics under reverse, ZeroTradeoffs 124and forward bias 833.17 Dynamic Switching Behavior of the Diode 1283.4.1 Reverse bias 833.18 Photo diodes, solar cells, and3. 4.2 Zero bias 83Light-Emitting Diodes 1293.4.3 Forward Bias 843.18.1 Photo diodes and3.5 Diode Temperature Coefficient 86Photodetectors 1293.6 Diodes under reverse bias 863.18.2 Power Generation from Solar Cells 1303.6.1 Saturation Current in real3.18. 3 Light-Emitting Diodes(LEDs)13Diodes 87Summary 1323.6.2 Reverse Breakdown 89Key Terms 1333.6.3 Diode model for the breakdownReference 134Region 90Additional Reading 1343.7 pn Junction Capacitance 90Problems 1343.7.1 Reverse bias 903.7.2 Forward Bias 91CHAPTER 43.8 Schottky Barrier Diode 933.9 Diode SPICE Model and layout 93FIELD-EFFECT TRANSISTORS 1443.9.1 Diode Layout 944.1 Characteristics of the MOS Capacitor 1453.10 Diode Circuit Analysis 954.1.1 Accumulation Region 1463.10.1 Load-Line Analysis 964.1.2 Depletion Region 1473.10.2 Analysis Using the Mathematical4.1.3 Inversion Region 147Model for the diode 974.2 The nmos transistor 1473.10.3 The Ideal diode model 1014.2.1 Qualitative i-v Behavior of the3.10.4 Constant Voltage Drop Model 103NMOS Transistor 1483.10.5 Model Comparison and4.2.2 Triode Region Characteristics ofDiscussion 104the nmos transistor 1493.11 Multiple-Diode Circuits 1054.2.3 On Resistance 1523.12 Analysis of Diodes Operating in the4.2.4 Transconductance 153Breakdown Region 1084.2.5 Saturation of the i-v3.12.1 Load-Line Analysis 108Characteristics 1543.12.2 Analysis with the Piecewise4.2.6 Mathematical model in theLinear model 108Saturation (Pinch-off)3.12.3 Voltage regulation 109Region 1553.12.4 Analysis Including Zener4.2.7 Transconductance in saturation 156Resistance 1104.2.8 Channel-Length Modulation 1563.12.5 Line and Load Regulation 1114.2.9 Transfer characteristics and3.13 Half-Wave Rectifier Circuits 112Depletion-Mode MosFETs 1573.13.1 Half-Wave Rectifier with resistor4.2.10 Body Effect or SubstrateLoad 112Sensitivity 1593.13.2 Rectifier Filter Capacitor 1134.3 PMOS Transistors 1603.13.3 Half-Wave Rectifier with rc load 1144.4 MOSFET Circuit Symbols 1623. 13.4 Ripple Voltage and Conduction4.5 Capacitances in MOS Transistors 165Interval 1154.5.1 NMOs Transistor Capacitances in3.13.5 Diode Current 117the Triode region 1653.13.6 Surge Current 1194.5.2 Capacitances in the Saturation3.13.7 Peak-Inverse-Voltage(PlV)Rating 119Region 1663.13.8 Diode Power Dissipation 1194.5.3 Capacitances in Cutoff 1663.13.9 Half-Wave Rectifier with Negative4.6 MOSFET Modeling in SPICE 167Output Voltage 1204.7 MOS Transistor Scaling 1683.14 Full-Wave Rectifier Circuits 1224.7.1 Drain Current 1693. 14.1 Full-Wave Rectifier with Negative4.7.2 Gate Capacitance 169Output Voltage 1234.7.3 Circuit and power densities 169ContentsIX4.7.4 Power-Delay Product 1705.3 The pnp Transistor 2234.7.5 Cutoff Frequency 1705.4 Equivalent Circuit Representations for the4.7.6 High Field Limitations 171Transport Models 2254.7.7 The unified mos transistor model5.5 The i-v Characteristics of the bipolarIncluding High Field Limitations 172Transistor 2264.7.8 Subthreshold conduction 1735.5.1 Output Characteristics 2264.8 MOs Transistor Fabrication and layout5.5.2 Transfer characteristics 227Design Rules 1745.6 The Operating Regions of the Bipolar4.8.1 Minimum Feature size andTransistor 227Alignment Tolerance 1745.7 Transport Model Simplifications 2284.8.2 Mos Transistor Layout 1745.7.1 Simplified Model for the Cutoff4.9 Biasing the NMOS Field-EffectRegion 229Transistor 1785.7.2 Model Simplifications for the4.9.1 Why Do We Need Bias? 178Forward-Active Region 2314.9.2 Four-Resistor Biasing 1805.7.3 Diodes in Bipolar Integrated4.9.3 Constant Gate-Source VoltageCircuits 237Bias 1845.7.4 Simplified Model for the4.9.4 Graphical analysis for theReverse-Active Region 238Q-Point 1845.7.5 Modeling Operation in the4.9.5 Analysis Including Body Effect 184Saturation Region 2404.9.6 Analysis Using the Unified5.8 Nonideal Behavior of the bipolarModel 187Transistor 2434.10 Biasing the PMos Field-Effect Transistor 1885.8.1 Junction Breakdown Voltages 2444.11 The junction Field-Effect Transistor5.8.2 Minority-Carrier Transport in theUFET190Base Region 2444.11.1 The JFET With Bias Applied 195.8.3 Base Transit time 2454.11.2 JFET Channel with Drain-Source5.8.4 Diffusion Capacitance 247Bias 1935.8.5 Frequency Dependence of the4.11.3 n-Channel jfet i-v Characteristics 193Common-Emitter current gain 2484.11.4 The p-Channel JFET 1955.8.6 The Early Effect and Early4.11.5 Circuit Symbols and JFET ModelVoltage 248Summary 1955.8.7 Modeling the Early Effect 2494.11.6 JFET Capacitances 1965.8.8 Origin of the Early Effect 2494.12 JFET Modeling in Spice 1965.9 Transconductance 2504.13 Biasing the JFET and Depletion-Mode5.10 Bipolar Technology and sPiCe Model 251MOSFET 1975.10.1 Qualitative Description 251Summary 2005.10.2 SPICE Model Equations 252Key Terms 2025.10.3 High-Performance BipolarReferences 202Transistors 253Problems 2035.11 Practical bias circuits for the bjt 2545.11.1 Four-Resistor bias network 256CHAPTER 55.11.2 Design Objectives for theBIPOLAR JUNCTION TRANSISTORS 215Four-Resistor bias network 2585.11.3 terative Analysis of the5.1 Physical Structure of the BipolarFour-Resistor bias circuit 262Transistor 2165.12 Tolerances in bias circuits 2625.2 The Transport Model for the npn5. 12.1 Worst-Case Analysis 263Transistor 2175. 12.2 Monte Carlo Analysis 2655.2.1 Forward Characteristics 218Summary 2685.2.2 Reverse Characteristics 220Key Terms 2705.2.3 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