mdio

代码说明：

  用VIVADO软件编写的，实现以太网芯片88E1510中的mdio控制模块代码，并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)

文件列表：

mdio
....\mdio.hw
....\.......\hw_1
....\.......\....\hw.xml,30372,2016-03-31
....\.......\....\layout
....\.......\....\......\dashboard_2.layout,247303,2016-01-19
....\.......\....\......\hw_ila_1.layout,80451,2016-03-31
....\.......\....\wave
....\.......\....\....\hw_ila_data_1
....\.......\....\....\.............\hw_ila_data_1.wcfg,2390,2016-03-31
....\.......\....\....\.............\hw_ila_data_1.wdb,8396,2016-03-31
....\.......\mdio.lpr,343,2016-01-08
....\.......\webtalk
....\.......\.......\.xsim_webtallk.info,60,2016-03-31
....\.......\.......\labtool_webtalk.log,727,2016-03-31
....\.......\.......\labtool_webtalk.tcl,4176,2016-03-31
....\.......\.......\usage_statistics_ext_labtool.html,2925,2016-03-31
....\.......\.......\usage_statistics_ext_labtool.wdm,1138,2016-03-31
....\.......\.......\usage_statistics_ext_labtool.xml,2527,2016-03-31
....\mdio.ioplanning
....\...............\constrs_1.new
....\mdio.runs
....\.........\clk_wiz_0_synth_1
....\.........\.................\.vivado.begin.rst,180,2016-01-16
....\.........\.................\.vivado.end.rst,0,2016-01-16
....\.........\.................\.Vivado_Synthesis.queue.rst,0,2016-01-16
....\.........\.................\clk_wiz_0.dcp,10473,2016-01-16
....\.........\.................\clk_wiz_0.tcl,3023,2016-01-16
....\.........\.................\clk_wiz_0.vds,22615,2016-01-16
....\.........\.................\clk_wiz_0_utilization_synth.pb,231,2016-01-16
....\.........\.................\clk_wiz_0_utilization_synth.rpt,6738,2016-01-16
....\.........\.................\dont_touch.xdc,1993,2016-01-16
....\.........\.................\gen_run.xml,2010,2016-03-31
....\.........\.................\htr.txt,379,2016-01-16
....\.........\.................\ISEWrap.js,4766,2016-01-16
....\.........\.................\ISEWrap.sh,1622,2016-01-16
....\.........\.................\project.wdf,1838,2016-01-16
....\.........\.................\rundef.js,1309,2016-01-16
....\.........\.................\runme.bat,229,2016-01-16
....\.........\.................\runme.log,22822,2016-01-16
....\.........\.................\runme.sh,1138,2016-01-16
....\.........\.................\vivado.jou,483,2016-01-16
....\.........\.................\vivado.pb,36321,2016-01-16
....\.........\ila_0_synth_1
....\.........\.............\.vivado.begin.rst,180,2016-01-16
....\.........\.............\.vivado.end.rst,0,2016-01-16
....\.........\.............\.Vivado_Synthesis.queue.rst,0,2016-01-16
....\.........\.............\gen_run.xml,1922,2016-03-31
....\.........\.............\htr.txt,371,2016-01-16
....\.........\.............\ila_0.dcp,1446888,2016-01-16
....\.........\.............\ila_0.tcl,2820,2016-01-16
....\.........\.............\ila_0.vds,2506666,2016-01-16
....\.........\.............\ila_0_utilization_synth.pb,231,2016-01-16
....\.........\.............\ila_0_utilization_synth.rpt,7488,2016-01-16
....\.........\.............\ISEWrap.js,4766,2016-01-16
....\.........\.............\ISEWrap.sh,1622,2016-01-16
....\.........\.............\project.wdf,1838,2016-01-16
....\.........\.............\rundef.js,1301,2016-01-16
....\.........\.............\runme.bat,229,2016-01-16
....\.........\.............\runme.log,12478142,2016-01-16
....\.........\.............\runme.sh,1130,2016-01-16
....\.........\.............\vivado.jou,467,2016-01-16
....\.........\.............\vivado.pb,3447827,2016-01-16
....\.........\impl_1
....\.........\......\.init_design.begin.rst,170,2016-03-31
....\.........\......\.init_design.end.rst,0,2016-03-31
....\.........\......\.opt_design.begin.rst,170,2016-03-31
....\.........\......\.opt_design.end.rst,0,2016-03-31
....\.........\......\.place_design.begin.rst,170,2016-03-31
....\.........\......\.place_design.end.rst,0,2016-03-31
....\.........\......\.route_design.begin.rst,170,2016-03-31
....\.........\......\.route_design.end.rst,0,2016-03-31
....\.........\......\.vivado.begin.rst,338,2016-03-31
....\.........\......\.vivado.end.rst,0,2016-03-31
....\.........\......\.Vivado_Implementation.queue.rst,0,2016-03-31
....\.........\......\.write_bitstream.begin.rst,170,2016-03-31
....\.........\......\.write_bitstream.end.rst,0,2016-03-31
....\.........\......\debug_nets.ltx,14788,2016-03-31
....\.........\......\gen_run.xml,8341,2016-03-31
....\.........\......\htr.txt,387,2016-03-31
....\.........\......\init_design.pb,3774,2016-03-31
....\.........\......\ISEWrap.js,4766,2016-03-31
....\.........\......\ISEWrap.sh,1622,2016-03-31
....\.........\......\opt_design.pb,7941,2016-03-31
....\.........\......\place_design.pb,17154,2016-03-31
....\.........\......\project.wdf,1839,2016-03-31
....\.........\......\route_design.pb,10305,2016-03-31
....\.........\......\rundef.js,1384,2016-03-31
....\.........\......\runme.bat,229,2016-03-31
....\.........\......\runme.log,27334,2016-03-31
....\.........\......\runme.sh,1206,2016-03-31
....\.........\......\test_mdio.bit,2192117,2016-03-31
....\.........\......\test_mdio.dcp,276687,2016-03-31
....\.........\......\test_mdio.tcl,1829,2016-03-31
....\.........\......\test_mdio.vdi,26987,2016-03-31
....\.........\......\test_mdio_11944.backup.vdi,23087,2016-03-19
....\.........\......\test_mdio_12660.backup.vdi,23087,2016-03-19
....\.........\......\test_mdio_3880.backup.vdi,22482,2016-01-19
....\.........\......\test_mdio_50684.backup.vdi,22897,2016-01-18
....\.........\......\test_mdio_9916.backup.vdi,22377,2016-03-31