Interleaver

代码说明：

  基于FPGA实现交织 在通信中交织的算法 已在板上通过测试(based on FPGA to Interleaver)

文件列表：

Interleaver\Interleaver.gise, 5258 , 2017-08-22
Interleaver\Interleaver.lso, 6 , 2017-08-22
Interleaver\Interleaver.prj, 69 , 2017-08-22
Interleaver\Interleaver.stx, 1792 , 2017-08-22
Interleaver\Interleaver.v, 3427 , 2017-08-22
Interleaver\Interleaver.xise, 36786 , 2017-08-22
Interleaver\Interleaver.xst, 1139 , 2017-08-22
Interleaver\Interleaver_summary.html, 3541 , 2017-08-22
Interleaver\ipcore_dir\coregen.cgp, 237 , 2017-08-18
Interleaver\ipcore_dir\coregen.log, 2797 , 2017-08-22
Interleaver\ipcore_dir\create_RAM128X32.tcl, 1280 , 2017-08-18
Interleaver\ipcore_dir\create_RAM512x32.tcl, 1280 , 2017-08-18
Interleaver\ipcore_dir\edit_RAM128X32.tcl, 1125 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\blk_mem_gen_v7_3_readme.txt, 7721 , 2013-10-14
Interleaver\ipcore_dir\RAM128X32\doc\blk_mem_gen_v7_3_vinfo.html, 8311 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\doc\pg058-blk-mem-gen.pdf, 7207569 , 2013-10-14
Interleaver\ipcore_dir\RAM128X32\example_design\RAM128X32_exdes.ucf, 2777 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\example_design\RAM128X32_exdes.vhd, 5397 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\example_design\RAM128X32_exdes.xdc, 2720 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\example_design\RAM128X32_prod.vhd, 10690 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\implement.bat, 1092 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\implement.sh, 1075 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\planAhead_ise.bat, 2686 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\planAhead_ise.sh, 2581 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\planAhead_ise.tcl, 3152 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\xst.prj, 44 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\implement\xst.scr, 227 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\addr_gen.vhd, 4526 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\bmg_stim_gen.vhd, 12836 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\bmg_tb_pkg.vhd, 6206 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\checker.vhd, 5768 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\data_gen.vhd, 5164 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simcmds.tcl, 2908 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_isim.bat, 3069 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_mti.bat, 114 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_mti.do, 3126 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_mti.sh, 114 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_ncsim.sh, 3105 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\simulate_vcs.sh, 2962 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\ucli_commands.key, 70 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\vcs_session.tcl, 3850 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\wave_mti.do, 1337 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\functional\wave_ncsim.sv, 939 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\RAM128X32_synth.vhd, 9697 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\RAM128X32_tb.vhd, 4665 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\random.vhd, 4220 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simcmds.tcl, 2908 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_isim.bat, 2985 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_mti.bat, 114 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_mti.do, 3151 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_mti.sh, 114 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_ncsim.sh, 3281 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\simulate_vcs.sh, 2898 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\ucli_commands.key, 70 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\vcs_session.tcl, 3864 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\wave_mti.do, 1337 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32\simulation\timing\wave_ncsim.sv, 937 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.asy, 866 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.gise, 1368 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.ngc, 15726 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.sym, 2437 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.v, 5920 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.veo, 4393 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.xco, 3286 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32.xise, 4799 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32_flist.txt, 2105 , 2017-08-22
Interleaver\ipcore_dir\RAM128X32_xmdf.tcl, 11317 , 2017-08-22
Interleaver\ipcore_dir\summary.log, 630 , 2017-08-22
Interleaver\ipcore_dir\tmp\RAM128X32.lso, 6 , 2017-08-22
Interleaver\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs, 761 , 2017-08-22
Interleaver\ipcore_dir\tmp\_xmsgs\xst.xmsgs, 32877 , 2017-08-22
Interleaver\ipcore_dir\_xmsgs\cg.xmsgs, 1446 , 2017-08-22
Interleaver\ipcore_dir\_xmsgs\pn_parser.xmsgs, 761 , 2017-08-22
Interleaver\iseconfig\Interleaver.projectmgr, 9157 , 2017-08-22
Interleaver\iseconfig\Interleaver.xreport, 20688 , 2017-08-22
Interleaver\tb2.fdo, 1307 , 2017-08-22
Interleaver\tb2.udo, 376 , 2017-08-21
Interleaver\tb2.v, 1588 , 2017-08-22
Interleaver\tb2.v.bak, 1670 , 2017-08-22
Interleaver\tb2_wave.fdo, 421 , 2017-08-21
Interleaver\tb3.v, 1623 , 2017-08-22
Interleaver\tb_Inter.fdo, 1332 , 2017-08-19
Interleaver\tb_Inter.udo, 380 , 2017-08-19
Interleaver\tb_Inter.v, 1289 , 2017-08-19
Interleaver\tb_Inter_wave.fdo, 425 , 2017-08-19
Interleaver\transcript, 1918 , 2017-08-22
Interleaver\vsim.wlf, 516096 , 2017-08-22
Interleaver\work\@interleaver\verilog.asm, 22904 , 2017-08-22
Interleaver\work\@interleaver\verilog.rw, 2125 , 2017-08-22
Interleaver\work\@interleaver\_primary.dat, 2317 , 2017-08-22
Interleaver\work\@interleaver\_primary.dbs, 2988 , 2017-08-22
Interleaver\work\@interleaver\_primary.vhd, 877 , 2017-08-22
Interleaver\work\@r@a@m128@x32\verilog.asm, 18488 , 2017-08-22
Interleaver\work\@r@a@m128@x32\verilog.rw, 87 , 2017-08-22
Interleaver\work\@r@a@m128@x32\_primary.dat, 4037 , 2017-08-22
Interleaver\work\@r@a@m128@x32\_primary.dbs, 2657 , 2017-08-22
Interleaver\work\@r@a@m128@x32\_primary.vhd, 578 , 2017-08-22
Interleaver\work\glbl\verilog.asm, 11792 , 2017-08-22
Interleaver\work\glbl\verilog.rw, 905 , 2017-08-22
Interleaver\work\glbl\_primary.dat, 1282 , 2017-08-22