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FPGA Design Patterns_100

于 2018-02-02 发布 文件大小:1446KB
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代码说明：

  LABVIEW工程完整程序，FPGA模块设计(LABVIEW engineering complete program, FPGA module design)

文件列表：

FPGA Design Patterns\dir.mnu, 4647 , 2010-07-27
FPGA Design Patterns\Enable Based Handshaking 4 Wire.vit, 13016 , 2010-07-27
FPGA Design Patterns\Examples, 0 , 2010-07-29
FPGA Design Patterns\Examples\dir.mnu, 4621 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\dir.mnu, 4673 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\FPGA, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\FPGA\_SubVIs, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\FPGA\_SubVIs\Multiplexing A Shared Resource_Access.vi, 223893 , 2010-07-27
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\FPGA\dir.mnu, 3883 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\FPGA\Multiplexing A Shared Resource_Access_FPGA Main.vi, 63987 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\Multiplexing a Resource_Access Project.vi, 13620 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\Multiplexing a Resource_Access.aliases, 95 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\Multiplexing a Resource_Access.lvlps, 86 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\Multiplexing a Resource_Access.lvproj, 22408 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Access\Multiplexing a Resource_Access_Host Main.vi, 60008 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\dir.mnu, 4745 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\FPGA, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\FPGA\_SubVIs, 0 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\FPGA\_SubVIs\Multiplexing A Shared Resource_Distribute.vi, 229925 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\FPGA\dir.mnu, 3879 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\FPGA\Multiplexing a Resource_Distribute_FPGA Main.vi, 67788 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\Multiplexing a Resource_Distribute Project.vi, 13622 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\Multiplexing a Resource_Distribute.aliases, 95 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\Multiplexing a Resource_Distribute.lvlps, 86 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\Multiplexing a Resource_Distribute.lvproj, 22551 , 2010-07-29
FPGA Design Patterns\Examples\Multiplexing a Resource_Distribute\Multiplexing a Resource_Distribute_Host Main.vi, 43456 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation, 0 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\dir.mnu, 4572 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA, 0 , 2010-07-23
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs, 0 , 2010-07-27
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\DMA Mux Routine.vi, 205827 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\DMA Mux Routine_State.ctl, 4454 , 2010-07-22
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\DMA Mux Routine_Variables.ctl, 4978 , 2010-07-27
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Gen Unit Test_Pulse Gen & Trigger.vi, 50109 , 2010-07-20
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Gen Unit Test_Pulse Gen.vi, 48279 , 2010-07-20
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses Routine.vi, 28283 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses Routine_Modes.ctl, 4402 , 2010-07-22
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses Routine_Settings.ctl, 4889 , 2010-07-27
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses State Machine.vi, 49645 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses State Machine_State Variables.ctl, 5250 , 2010-07-22
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Generate Pulses State Machine_State.ctl, 4460 , 2010-07-22
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Read Local FIFOs.vi, 116328 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\_SubVIs\Triggering Routine.vi, 45898 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\dir.mnu, 3811 , 2010-07-23
FPGA Design Patterns\Examples\Timing and Pulse Generation\FPGA\Timing and Pulse Generation_FPGA Main.vi, 122989 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\Timing and Pulse Generation Example.aliases, 91 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\Timing and Pulse Generation Example.lvlps, 85 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\Timing and Pulse Generation Example.lvproj, 69780 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\Timing and Pulse Generation Project.vi, 13503 , 2010-07-29
FPGA Design Patterns\Examples\Timing and Pulse Generation\Timing and Pulse Generation_Host Main.vi, 69809 , 2010-07-29
FPGA Design Patterns\FPGA Design Templates Project.aliases, 47 , 2010-07-29
FPGA Design Patterns\FPGA Design Templates Project.lvlps, 85 , 2010-07-27
FPGA Design Patterns\FPGA Design Templates Project.lvproj, 9522 , 2010-07-27
FPGA Design Patterns\FPGA Design Templates Project.vi, 13533 , 2010-07-29
FPGA Design Patterns\FPGA State Machine.vit, 7799 , 2010-07-27
FPGA Design Patterns\Multiplexing A Shared Resource_Access.vit, 168322 , 2010-07-27
FPGA Design Patterns\Multiplexing A Shared Resource_Distribute.vit, 173882 , 2010-07-27
FPGA Design Patterns\Utility VIs, 0 , 2010-07-22
FPGA Design Patterns\Utility VIs\Detemine Ready for Input.vi, 13800 , 2010-07-22
FPGA Design Patterns\Utility VIs\Determine Output Valid.vi, 17286 , 2010-07-23
FPGA Design Patterns\Utility VIs\dir.mnu, 1872 , 2010-07-22

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    labveiw实现基带信号的幅度调制（AM），频率调制(FM)和相位调制(PM)，可以在波形图中看到调制信号和调制后信号的叠加和对比，可以看到频域波形。载波与基带幅度和频率参数均可改变。(Baseband AM/FM/PM in labview. In the vi, you ll be able to see the modulated signal in both time and frequency domain.)
    2015-04-29 23:28:17下载
    积分：1
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    说明：  读取TDMS文件，labview 2016 测试通过。(Read the TDMS file, and LabVIEW 2016 passed the test.)
    2019-11-08 10:44:20下载
    积分：1
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    基于Labview的数字滤波器与频谱分析仪 滤波器可以选择是否打开滤波器，可显示波形，可设置滤波器参数，可测量时域、频域的参数，可保存数据、图像；频谱分析仪可显示波形，可测量频域参数(Labview-based digital filter and spectrum analyzer filter can choose whether to open the filter to display the waveform, the filter parameters can be set to measure the time domain, frequency domain parameters, save the data, images spectrum analyzer display waveform, measurable frequency domain parameters)
    2012-08-01 20:18:43下载
    积分：1
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    基于LabvIEw的通用自动测试系统(ATs)舍计算机，可鳊程激励、响应数据采集及uuT模块，采用MxI总线控制方式。专用信号发生器为uuT提供模拟激励信号，矩阵开关和适配器完成不同信号间切换。主控计算机执行测试程序，信号发生器发送激励信号，数据采集卡采集数据，采集数据经调理后，并与标准数据|匕较是否满足相应测试结果。(The general automatic test system (ATs) based on LabvIEw can be used as a computer to excite, respond to data acquisition and uuT module. The control mode of MxI bus is adopted. Special signal generator provides analog excitation signal for uuT, matrix switch and adapter complete switching between different signals. The main control computer executes the test program, the signal generator sends the excitation signal, the data acquisition card collects the data, after the data acquisition is adjusted, and compares with the standard data | dagger whether it meets the corresponding test results.)
    2020-10-24 12:27:23下载
    积分：1
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    2013-12-06 16:26:38下载
    积分：1
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    2015-12-09 22:12:50下载
    积分：1
  • simple-taida-motor-control_labview
    控制台达电机旋转的简易例程，其实就是给台达电机发命令哪(Simple console routines of motor rotation)
    2013-08-18 13:09:33下载
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    说明：  串口自动换算CRC代码，编写时直接可以调用(Serial port automatically converts CRC code, which can be called directly when writing.)
    2020-06-21 20:20:01下载
    积分：1
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    2020-06-20 18:40:28下载
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