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ALU_74181_me

于 2020-11-11 发布 文件大小:188KB
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代码说明:

  学习ALU的设计方法。 2、用HDL语言采用行为描述的方法完成74181的逻辑设计 。(Learn the design method of ALU. 2, use HDL language to use behavioral description method to complete 74181 logical design.)

文件列表:

ALU_74181_me\ALU_74181_me.done, 26 , 2018-05-16
ALU_74181_me\ALU_74181_me.eda.rpt, 2610 , 2018-05-16
ALU_74181_me\ALU_74181_me.flow.rpt, 8389 , 2018-05-16
ALU_74181_me\ALU_74181_me.map.rpt, 23343 , 2018-05-16
ALU_74181_me\ALU_74181_me.map.summary, 468 , 2018-05-16
ALU_74181_me\ALU_74181_me.qpf, 1265 , 2018-05-14
ALU_74181_me\ALU_74181_me.qsf, 3567 , 2018-05-22
ALU_74181_me\ALU_74181_me.v, 1823 , 2018-05-16
ALU_74181_me\ALU_74181_me.v.bak, 860 , 2018-05-14
ALU_74181_me\ALU_74181_me_nativelink_simulation.rpt, 1034 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.(0).cnf.cdb, 7187 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.(0).cnf.hdb, 1808 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.cbx.xml, 94 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.cmp.hdb, 13193 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.cmp.rdb, 5304 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.cmp_merge.kpt, 210 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.db_info, 137 , 2018-05-14
ALU_74181_me\db\ALU_74181_me.eda.qmsg, 2418 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.hier_info, 3935 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.hif, 775 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.lpc.html, 430 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.lpc.rdb, 387 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.lpc.txt, 1060 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.bpm, 774 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.cdb, 9708 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.hdb, 12967 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.kpt, 207 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.logdb, 4 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map.qmsg, 12280 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map_bb.cdb, 1110 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map_bb.hdb, 8732 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.map_bb.logdb, 4 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.pre_map.cdb, 7225 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.pre_map.hdb, 9795 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.rtlv.hdb, 9783 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.rtlv_sg.cdb, 6819 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.rtlv_sg_swap.cdb, 176 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.sgdiff.cdb, 10079 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.sgdiff.hdb, 9900 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.sld_design_entry.sci, 196 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.sld_design_entry_dsc.sci, 196 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.smart_action.txt, 8 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.syn_hier_info, 0 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.tis_db_list.ddb, 212 , 2018-05-16
ALU_74181_me\db\ALU_74181_me.tmw_info, 58 , 2018-05-22
ALU_74181_me\db\logic_util_heursitic.dat, 0 , 2018-05-16
ALU_74181_me\db\prev_cmp_ALU_74181_me.qmsg, 12280 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions\ALU_74181_me.db_info, 137 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions\ALU_74181_me.root_partition.map.cdb, 9802 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions\ALU_74181_me.root_partition.map.dpi, 698 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions\ALU_74181_me.root_partition.map.hdb, 12586 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions\ALU_74181_me.root_partition.map.kpt, 210 , 2018-05-16
ALU_74181_me\incremental_db\README, 653 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me.vt, 2566 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me.vt.bak, 2566 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do, 555 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak1, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak2, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak3, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak4, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak5, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak6, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak7, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\ALU_74181_me_run_msim_rtl_verilog.do.bak8, 595 , 2018-05-16
ALU_74181_me\simulation\modelsim\modelsim.ini, 11083 , 2018-05-16
ALU_74181_me\simulation\modelsim\msim_transcript, 1713 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me\verilog.prw, 4988 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me\verilog.psm, 33872 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me\_primary.dat, 2832 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me\_primary.dbs, 7048 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me\_primary.vhd, 606 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst\verilog.prw, 3242 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst\verilog.psm, 10784 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst\_primary.dat, 996 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst\_primary.dbs, 2156 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst\_primary.vhd, 100 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\_info, 785 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\_vmake, 26 , 2018-05-16
ALU_74181_me\simulation\modelsim\vsim.wlf, 40960 , 2018-05-22
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me, 0 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\@a@l@u_74181_me_vlg_tst, 0 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work\_temp, 0 , 2018-05-16
ALU_74181_me\simulation\modelsim\rtl_work, 0 , 2018-05-16
ALU_74181_me\incremental_db\compiled_partitions, 0 , 2018-05-16
ALU_74181_me\simulation\modelsim, 0 , 2018-05-16
ALU_74181_me\db, 0 , 2018-05-22
ALU_74181_me\incremental_db, 0 , 2018-05-16
ALU_74181_me\simulation, 0 , 2018-05-16
ALU_74181_me, 0 , 2018-05-16

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