登录
首页 » Verilog » verilog HDL

verilog HDL

于 2020-09-04 发布
0 258
下载积分: 1 下载次数: 4

代码说明:

说明:  DS18B20温度模块,LCD1602显示(DS18B20 Temperature Module, LCD1602 Display)

文件列表:

verilog HDL, 0 , 2014-07-04
verilog HDL\DS1802, 0 , 2014-06-24
verilog HDL\DS1802\da0832.v, 1575 , 2014-06-24
verilog HDL\DS1802\da0832.v.bak, 703 , 2014-06-24
verilog HDL\DS1802\da18.asm.rpt, 7835 , 2014-06-24
verilog HDL\DS1802\da18.cdf, 320 , 2014-06-24
verilog HDL\DS1802\da18.done, 26 , 2014-06-24
verilog HDL\DS1802\da18.dpf, 1179 , 2014-06-24
verilog HDL\DS1802\da18.fit.rpt, 178115 , 2014-06-24
verilog HDL\DS1802\da18.fit.smsg, 513 , 2014-06-24
verilog HDL\DS1802\da18.fit.summary, 593 , 2014-06-24
verilog HDL\DS1802\da18.flow.rpt, 8211 , 2014-06-24
verilog HDL\DS1802\da18.map.rpt, 53006 , 2014-06-24
verilog HDL\DS1802\da18.map.smsg, 405 , 2014-06-24
verilog HDL\DS1802\da18.map.summary, 457 , 2014-06-24
verilog HDL\DS1802\da18.pin, 20250 , 2014-06-24
verilog HDL\DS1802\da18.pof, 524475 , 2014-06-24
verilog HDL\DS1802\da18.qpf, 1260 , 2014-06-24
verilog HDL\DS1802\da18.qsf, 4611 , 2014-06-24
verilog HDL\DS1802\da18.sof, 358317 , 2014-06-24
verilog HDL\DS1802\da18.sta.rpt, 696995 , 2014-06-24
verilog HDL\DS1802\da18.sta.summary, 4593 , 2014-06-24
verilog HDL\DS1802\da18.v, 542 , 2019-05-28
verilog HDL\DS1802\da18.v.bak, 304 , 2014-06-24
verilog HDL\DS1802\db, 0 , 2014-06-24
verilog HDL\DS1802\db\da18.(0).cnf.cdb, 2012 , 2014-06-24
verilog HDL\DS1802\db\da18.(0).cnf.hdb, 1101 , 2014-06-24
verilog HDL\DS1802\db\da18.(1).cnf.cdb, 44832 , 2014-06-24
verilog HDL\DS1802\db\da18.(1).cnf.hdb, 3250 , 2014-06-24
verilog HDL\DS1802\db\da18.(2).cnf.cdb, 16937 , 2014-06-24
verilog HDL\DS1802\db\da18.(2).cnf.hdb, 2489 , 2014-06-24
verilog HDL\DS1802\db\da18.(3).cnf.cdb, 5900 , 2014-06-24
verilog HDL\DS1802\db\da18.(3).cnf.hdb, 1779 , 2014-06-24
verilog HDL\DS1802\db\da18.amm.cdb, 541 , 2014-06-24
verilog HDL\DS1802\db\da18.asm.qmsg, 2184 , 2014-06-24
verilog HDL\DS1802\db\da18.asm.rdb, 1407 , 2014-06-24
verilog HDL\DS1802\db\da18.asm_labs.ddb, 11843 , 2014-06-24
verilog HDL\DS1802\db\da18.cbx.xml, 86 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.bpm, 831 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.cdb, 70605 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.hdb, 19204 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.kpt, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.logdb, 15176 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.rdb, 21475 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp_merge.kpt, 201 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd, 746340 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd, 745247 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd, 740378 , 2014-06-24
verilog HDL\DS1802\db\da18.db_info, 138 , 2014-06-24
verilog HDL\DS1802\db\da18.fit.qmsg, 32721 , 2014-06-24
verilog HDL\DS1802\db\da18.hier_info, 6304 , 2014-06-24
verilog HDL\DS1802\db\da18.hif, 3888 , 2014-06-24
verilog HDL\DS1802\db\da18.idb.cdb, 9158 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.html, 1588 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.rdb, 491 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.txt, 1926 , 2014-06-24
verilog HDL\DS1802\db\da18.map.bpm, 794 , 2014-06-24
verilog HDL\DS1802\db\da18.map.cdb, 20473 , 2014-06-24
verilog HDL\DS1802\db\da18.map.hdb, 18502 , 2014-06-24
verilog HDL\DS1802\db\da18.map.kpt, 5908 , 2014-06-24
verilog HDL\DS1802\db\da18.map.logdb, 4 , 2014-06-24
verilog HDL\DS1802\db\da18.map.qmsg, 22241 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.cdb, 1160 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.hdb, 9277 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.logdb, 4 , 2014-06-24
verilog HDL\DS1802\db\da18.pre_map.cdb, 69273 , 2014-06-24
verilog HDL\DS1802\db\da18.pre_map.hdb, 15598 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv.hdb, 15467 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv_sg.cdb, 69775 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv_sg_swap.cdb, 1339 , 2014-06-24
verilog HDL\DS1802\db\da18.sgdiff.cdb, 28163 , 2014-06-24
verilog HDL\DS1802\db\da18.sgdiff.hdb, 16655 , 2014-06-24
verilog HDL\DS1802\db\da18.sld_design_entry.sci, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.sld_design_entry_dsc.sci, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.smart_action.txt, 6 , 2014-06-24
verilog HDL\DS1802\db\da18.smp_dump.txt, 2884 , 2014-06-24
verilog HDL\DS1802\db\da18.sta.qmsg, 102622 , 2014-06-24
verilog HDL\DS1802\db\da18.sta.rdb, 51148 , 2014-06-24
verilog HDL\DS1802\db\da18.sta_cmp.8_slow_1200mv_85c.tdb, 74031 , 2014-06-24
verilog HDL\DS1802\db\da18.syn_hier_info, 0 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fastest_slow_1200mv_0c.ddb, 148200 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fastest_slow_1200mv_85c.ddb, 147904 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fast_1200mv_0c.ddb, 319194 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.slow_1200mv_0c.ddb, 322669 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.slow_1200mv_85c.ddb, 322212 , 2014-06-24
verilog HDL\DS1802\db\da18.tis_db_list.ddb, 231 , 2014-06-24
verilog HDL\DS1802\db\logic_util_heursitic.dat, 22308 , 2014-06-24
verilog HDL\DS1802\db\prev_cmp_da18.qmsg, 160270 , 2014-06-24
verilog HDL\DS1802\incremental_db, 0 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions, 0 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.db_info, 138 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.cdb, 29719 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.dfp, 33 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.hdb, 18932 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.kpt, 199 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.logdb, 4 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.rcfdb, 34011 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.cdb, 20314 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.dpi, 1261 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.hbdb.cdb, 604 , 2014-06-24

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 8
    说明:  8. 单径瑞利信道中的四发四收V-BLAST: (1) 请设计一种具体的导引辅助的信道估计方法,用Simulink进行仿真,测量16QAM调制时的误码率性能。画出比特信噪比与信道估计均方误差的关系曲线,画出比特信噪比与误码率的关系曲线。 (2) 计算所设计方案的频谱效率是多少,单位为bit/Hz/s。(8. Four transmit four receive v-blast in single-path Rayleigh channel: (1) please design a specific navigation-assisted channel estimation method and conduct simulation with Simulink to measure the bit error rate performance of 16QAM modulation.The relation curve between the bit signal-noise ratio and the mean square error of channel estimation is drawn, and the relation curve between the bit signal-noise ratio and the bit error rate is drawn. (2) calculate the spectral efficiency of the designed scheme in bit/Hz/s.)
    2019-01-15 11:01:23下载
    积分:1
  • scm
    无线信道中MIMO信道建模仿真,3gpp中MIMO信道的仿真程序,matlab仿真(Channel MIMO wireless channel modeling and simulation, 3gpp in MIMO channel emulation program, matlab simulation)
    2021-04-17 15:08:53下载
    积分:1
  • GF2_DLL
    说明:  Download and Install Matlab r2015a Full - Duration
    2019-09-25 10:56:43下载
    积分:1
  • 10_4
    说明:  通信天线建模与MATLAB仿真分析书中10-4题目代码(Lossy Extractio Communication Antenna Modeling and MATLAB Simulation Analysis Book 10-4 Topic Code)
    2020-06-17 19:00:01下载
    积分:1
  • CA_CFAR
    仿真了恒虚警的平均单元算法,给出仿真结果,同时分析了不同窗口数对虚警率和检测率的影响,并写了详细的注释(The constant false alarm average cell algorithm is simulated, and the simulation results are given. Meanwhile, the influence of different window numbers on false alarm rate and detection rate is analyzed, and detailed annotations are written.)
    2017-12-05 13:36:59下载
    积分:1
  • vad-master
    说明:  调用webrtc中的VAD算法,可以实现录音文件的语音端点检测,时延7.8ms(Calling VAD algorithm in webrtc, voice endpoint detection of recording file can be realized with a delay of 7.8ms)
    2020-03-19 10:20:48下载
    积分:1
  • TCH-data-channel
    TCH全速率,实现把源码发送并利用纠错和交织保护来保护源码(TCH full rate, realize the source code to send and the use of error correction and interwoven protection to protect the source code)
    2012-03-17 13:32:09下载
    积分:1
  • statisticalMIMOradar
    说明:  统计MIMO雷达的国外课件,对统计MIMO进行介绍包括一些仿真(statistical MIMO radar)
    2010-04-17 16:30:12下载
    积分:1
  • boyilun
    利用博弈论对认知无线电的新研究算法,希望对大家有帮助(Using game theory, a new study on cognitive radio algorithms, we want to help)
    2011-01-24 20:24:50下载
    积分:1
  • FIR滤波器
    说明:  线性相位 FIR 低通、高通、带通和带阻滤波器的设计方法,频率采样设计法的基本概念和线性相位的实现方法。几种线性相位的特点,熟悉和掌握矩形窗、三角形窗、汉宁窗、海明窗、布莱克曼窗、凯塞窗设计 IIR 数字滤波器的方法,频率抽样设计法的线性相位的设计方法,并对各种线性相位的频率抽样法的设计给出调整和改进。 利用 MATLAB 进行各类 FIR 数字滤波器的设计方法。(The design method of linear phase FIR low pass, high pass, band pass and band stop filter, the basic concept of frequency sampling design method and the realization method of linear phase. Familiar with and master the design methods of IIR digital filter of rectangle window, triangle window, Hanning window, Heming window, Blackman window and Kaiser window, and the design methods of linear phase of frequency sampling design method, and adjust and improve the design of frequency sampling method of various linear phases. Matlab is used to design all kinds of FIR digital filters.)
    2019-12-23 17:08:05下载
    积分:1
  • 696518资源总数
  • 106227会员总数
  • 11今日下载