can_init

代码说明：

说明：  通过SPI接口实现FPGA和MCP2515独立CAN芯片通信，功能使用modelsim仿真，实现了配置、接收、发送功能。(The communication between FPGA and MCP2515 independent can chip is realized by SPI interface. The function is simulated by Modelsim, and the function of configuration, receiving and sending is realized.)

文件列表：

can_init\work\glbl\_primary.vhd, 351 , 2019-07-25
can_init\work\glbl\verilog.rw64, 7223 , 2019-07-25
can_init\work\glbl\_primary.dat, 1229 , 2019-07-25
can_init\work\glbl\_primary.dbs, 2173 , 2019-07-25
can_init\work\glbl\verilog.asm64, 21200 , 2019-07-25
can_init\work\_vmake, 26 , 2019-07-25
can_init\work\@m@c@p_@i@n@i@t\_primary.dat, 8261 , 2019-07-25
can_init\work\@m@c@p_@i@n@i@t\_primary.dbs, 20016 , 2019-07-25
can_init\work\@m@c@p_@i@n@i@t\verilog.asm64, 83024 , 2019-07-25
can_init\work\@m@c@p_@i@n@i@t\_primary.vhd, 1582 , 2019-07-25
can_init\work\@m@c@p_@i@n@i@t\verilog.rw64, 21242 , 2019-07-25
can_init\work\can_tb_top\_primary.dat, 1982 , 2019-07-25
can_init\work\can_tb_top\_primary.dbs, 4330 , 2019-07-25
can_init\work\can_tb_top\verilog.asm64, 29568 , 2019-07-25
can_init\work\can_tb_top\_primary.vhd, 80 , 2019-07-25
can_init\work\can_tb_top\verilog.rw64, 12462 , 2019-07-25
can_init\work\_info, 1165 , 2019-07-25
can_init\do.tcl, 145 , 2019-07-25
can_init\glbl.v, 1366 , 2019-07-25
can_init\can_init.mpf, 75721 , 2019-07-25
can_init\vsim.wlf, 212992 , 2019-07-25
can_init\MCP_INIT.v, 20311 , 2019-07-25
can_init\can_tb_top.v, 1935 , 2019-07-25
can_init\can_init.cr.mti, 719 , 2019-07-25
can_init\work\glbl, 0 , 2020-02-22
can_init\work\@m@c@p_@i@n@i@t, 0 , 2020-02-22
can_init\work\_temp, 0 , 2020-02-22
can_init\work\can_tb_top, 0 , 2020-02-22
can_init\work, 0 , 2020-02-22
can_init, 0 , 2020-02-22