基于FPGA的多路同步脉冲发生器设计1
代码说明:
说明: 采用FPGA(现场可编程门序列)编写VHDL语言设计多路同步脉冲发生器,对信号进行分频处理,实现四路信号相位相差T/16和T/8的延迟相位输出,实现的四路脉冲与传统的脉冲同步器不同,它具有高集成度,高通用性,容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
文件列表:
基于FPGA的多路同步脉冲发生器设计1.docx, 12063 , 2020-03-18
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