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二维热传导方程求解
求解二维热传导方程，文档中有过程和matlab程序。本文利用有限差分法来求二维热传导方程的数值解，通过Matlab编程求解并作图，进而与解析解做出的图进行比较，画出误差图。
- 2020-05-30下载
- 积分：1
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STM32自学笔记代码
本书主要介绍ARM Cortex—M3系列STM32的原理及应用，全书共7章。第1章主要对STM32做基本介绍；第2章介绍ARM Cortex—M3内核架构的大致概况；第3章从外设特性、功耗特性、安全特性等方面对STM32进行全面的剖析；第4章主要介绍开发工具；第5章则引导读者针对STM32的外设进行一系列的基础实验设计；第6章通过10篇高级应用文章介绍STM32的一些高级知识；第7章则通过一个综合IAP实例讲述一个STM32完整应用方案的实现过程。
- 2021-05-06下载
- 积分：1
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CAD绘图电气元件库
【实例简介】很齐全的电气元件库。文件为DWG文件，需要用AUTOCAD软件来游览。
- 2021-11-19 00:31:50下载
- 积分：1
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K60的中文资料
此文档介绍了K60单片机的一些结构功能，纯中文。K60P144M1OOSF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6. Nov 201夲部分讲解如何配置芯片上的嵌套向量中断控制器。完整信息清参阅htp/www.arm.com。InterruptsModulePPBNested VectoredModuleInterrupt Controller(NVIC)Module图32嵌套向量中断控制器题日相关模块参考链接套问量中断控制器http://www.arm.com系统内存映System memory map时钟Clock distribution电源管理Power management专用外设总线ARM Cortex-M4核心 ARM Cortex-M43.22.1中断优先级器件支持16级中断优先级,因此在嵌套向量中断控制器中,每一个中断源在优先级控制寄存器IP中都有4个位。例如IPRO中3302928a7262524232221a019181716|151413121110976543210R0000006000600000W3.22.2非可屏蔽中断非可屏蔽中断的中断源来自于外部的NM引脚。此引脚是多路复用引脚,必须要配置他的功能,使其成为外部不可屏蔽中断功能引脚。322.3中断分配中断默认按照下表分配向量号:当中断使用时,此值储存在栈中。IRQ号:非核心中断源,对应的编号为终端号减16。IRQ号在ARM的NVC文档中有描述表34中断号分配址址中断编号IRQ号非优先级编中断伏先溟模块描述(1)号(2)级编号(3)ARM核心中析源0x00000000ARM内核切始牟栈指针0x00000004ARM内核初始程序计数器Editbylie:soonli@qq.comK60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 2010x00000082AHM内核非可屏蔽中断x00000c3ARM内核哽件故障0x000000101ARM内核存储控制器故障0x0000145ARM内核总线故障0x000000186ARM内核用故障0x000001C70x00002080x0000219x00028100x000002C11ARM内核管理程序调入0x000003012ARM内核周试监控0x000034130x0000003814ARM内核0x0000315ARM内核系统往拍定时器非核心中新源0x00000040160DMADA通道0发送完成0x000000141DMADMA通道⊥发送完成0×00004818DMAD)MA通道2发送完成000401DMA通道3发送完成0x0000020DA通道4发送完成0300052DMA通道5发送完成0x00000582DMADMA通道6发送完成0x000_005C2sDMADMA通道7发送完成0x0000006021DMA通道8发送完成0x0000006425DMADMA通道9发送完成0x0000006826⊥0DMADMA通道10发送完成0x000006C27DMADMA通道11发送完成0x00007028DMA通道12发送完成0x000007429DMA通道13发送完成0x0000087314DMA通道1发送完成0x00007C3IMA通道15发送完成0x00000803216DMADMA通道0-15故障0x00000081MCM0x00000883184闪存命令执行完成0x000008C35闪存读取冲突0x0000009036模式控制掉电中断,电检测低澌喚醒单兀注意:在需要使用低漏检测0x00000094370低漏唤醒|的时候不要禁止这个中断0x000009838看门狗看门狗中断0x0000009c39230x00000A441IICIEditbylie:soonli@qq.com4K60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 2010x0000A84SPD所有中断源使用一个向量x0000AC4SPI1所有中断源使用一个向量0x000000B014SPI2所有中断源使用一个向量CR’ ed Message bufi0x000000B44529CANO(0-15)0x00000846CAND总线关闭0x0000BC47错误0x000000C048CANO发送报警x00000C449CANO接收报整0x000000C850CAND唤帼0x00000CC50x0000000520x000000D1537CAN⊥5)0x000000D8CANI总线关闭0x00000DC5CAN⊥错误0x000000E05610发送报警0x0000C457接收报警0x0000E858唤醒0x0000EC59100x0000F06011l⊥0000F461JJARTO串口0状态中新源0x00000F862UARTO串口0错误中新源0y000000FC11UARTI串口1状态中断源0x00010064UARTI串口1错昃中源x0000010465UART2串口2状态中新源000001085650UART2串口2错昃中粉溴0x000067UaRT串口3状态中新源0x000011068UART串口3错误中析源0x0001146gUART4串口4状态中析源00011870UART串口4错误中析源0x0000011C715513UART串口5状态中新源0x0000120721111111UART5串5错误中析源0x00001247370x000128740x00012c75CMPO0x00003076CMPI0x000013476115CMP20x000001387815FTM0所有中断源使一个向量0x000013C7963FTM1所有中断源使用一个向量0x00001408064FTM2所有中断源使用一个向量000014481160x0000014816报警中断Editbylie:soonli@qq.comK60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 2010x00014C8x0001508PITPIT通道00x000001518517PITPIT通道10x0000015886017PITPIT通道20x0000015C81PITPIT通道30x0000160882180x000016489USB OTx001689074充电检测0x0000016C|91Ethernet macIEEE1588定时器中断0x000017092Ethernet mac发送中断0x0000017497719Ethernet mac接收中断0x00001789EtherneL mac错误和其他中断0x00017C950x00000180|96SDH0x00184978120DACO0x000001889DACI0x0001899TsT所有中断源使用一个向量0x0000901008120x0000194101低功耗定时器00001981020x000019c10321引因控制模块PORTA引脚中断000001A0104引却控制模块PORTB引脚中断00004105引脚控制模块PORTC引脚中断0x0001AB106引閎控制模块PORTD引脚中断0x00000⊥AC10791引脚控制模块P0RTE引脚中断0×001B01080x000011090×00010701094软中断软件中断(4)(1)表示嵌套向量中断控制器的中断源号(2)表示嵌套向量中断控制器对于响应中断的ISER,ⅠCER,ISPR,ICPR和IABR寄存器的值,计算方法是IRQ的值除以32。(3〕表示嵌套向量中断控制器对于响应中断的IPR寄存器的值,计算方法是IRQ的值狳以4(4)此中断只能被NVC寄存器置位或者清零。3.2.2.3.1确定位域和寄存器的位置,来配置一个特定的中断如果你需要配置低功耗寄存器中断,下面的表格自“中断号分配”地址中断编号1RQ号非优先级编中断优先源模块描述号(2)级编号(3)0x0000019410」2⊥低功耗定时器译者注:下面角标的注解没有被列出,请看上表末尾。1)在NⅥC寄存器中,你需要配置关于中断的信息Editbylie:soonli@qq.comK60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 201· NVICISER2NVICICER2· NVICISPR2· NVICICPE2NVICIABR2NVICIPR212)确定特定中淅在相对应的寄存器中的特定位域(汗,这句话怎么这么别扭)。NVICISER2, NVICICER2, NVICISPR2, NVICICPR2, NVICIABR2 7位置=IRQ/32=21NⅥCIPR21位域的起始地址=8*(IRQ/4)+4=12因为 NVICIPR的位域的4位宽,所以 NVICIPR21的范围是12-15。因此,下列的位域的位是用来配置低功耗定时器的中断的。NVICISER2[21]NVICICER2[21NVICISPR2(21NVICICPR2[21NVICIABR2[211NVICIPR21[15: 123.2.3异步唤醒中断的配置夲节概述如何配置芯片中的相应模垬。在AM的文档中有更加完整的描述信息www.armcomClock logicWake-upquesynchronousModuleWake-up InterruptController(AWIC)Module图3-3异步唤醒单元主题相关模块参考链接系统存储映射System memory mat时钟Clock distribution电源管理Powcr managcmcnt嵌套向量中断控制器NVIC唤醒请求AWIC wake-up sources3.2.3.1唤醒源器件使用一下的内部或者外部异步唤醒输入模块Editbylie:soonli@qq.comK60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 201唤醒源描述可用的系统复位复位引脚和看门狗(当使用LPO时钟源吋),JTAG接口低电压检测模块控制器低电压警告模块控制器引脚中断引脚控制模块,任何一个中断使能的引胭都可以吹醒系统ADC「当使用内部时钟源的时候可是实现这个功能CMP由于没有系统时钟可以使用,所以此时是无效的LIC地址匹配唤醒接收眺变唤醒USB唤醒功能唤醒低功耗定时器在Stop/ⅥPS模式下有效实时时钟在Stop/ⅦLPS模式卜有效以太网魔法包唤醒SDIIC唤陧功能唤醒IIS唤醒功能唤醒1588时钟唤醒功能唤醒TSICAN3.2.3JTAG控制器配置本节概述如何配置芯片中的相应模块。在后面专门的章节中有更全面的介绍。JTAG controller图3-4JTAG控制器表38相关信息的参考链接题相关模块参考链接仝面介绍JT△GCJTAGC信号传输设置引脚控制Signal multiplexing3.3系统模块3.3.1系统集成控制模块(SIM)配置Editbylie:soonli@qq.comK6OP144M100SF2RM. pdf K60 Sub-Family Reference Manual, Rev. 6 Nov 201本节概述如何配置芯片中的相应模块。在后面专门的章节中有更全面的介绍PeripheralbridgeegisteracceSSResetsMode controller图35系统集成控制模块表39相关信息的参考链接主题相关模块参考链接全面介绍系统集成控制模块系统存储映射Systcm memory maj时钟Clock distribution电源管理Power management3.3.2模式控制器模块本节概述如何配置芯片中的相应模块。在后面专门的章节中有更全面的介绍。PeripheralbridgeRegistResetsMode controller图3-6模式控制模块表3-10相关信息的参考链接题相关模块参考链接全面介绍模式控制模块Mode controllerEditbylie:soonli@qq.comK60P144M100SF2RM. pdfK60 Sub-Family Reference Manual, Rev. 6 NoV 201系统存储映射System memory map电源管理Power management电源管理控制器PMO3.3.3电源管理控制模块本节概述如何配置芯片中的相应模块。在后面专门的章节中有更仝面的介绍PeriphebridgeRegisteraccessPower managementcontroller(PMC)图37电源管理控制模块表3-11相关信息的参考链接主题相关模块参考链接全面介绍PMCPMC系统存储映射System memory map电源管理Powcr managcmcnt面介绍Mode controller低漏唤醒单元LLWU3.3.4低漏唤醒单元节概述如何配置芯片中的相应模块。在后面专门的章节中有更全面的介绍。Editbylie:soonli@qq.com
- 2020-12-03下载
- 积分：1
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基于java web的医院在线挂号系统
医院挂号系统主要用于实现医院的挂号，前台基本功能包括：用户注册、用户登录、医院查询、挂号、取消挂号、修改个人信息、退出等。后台基本功能包括：系统管理员登录、医院管理、科室管理、公告管理、退出系统等。
- 2020-12-05下载
- 积分：1
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matlab 主成分分析
本人为了获得更多资源共享的权限，只好吐血奉献自己一年来收集和改写的matlab源程序，部分为原创；里面包含有主成分分析、岭回归分析、因子分析、判别分析、聚类分析、回归分析等；绝对可用哦，不过，还是得提醒一下，由于一直是自己使用，里面没有更多注释，希望没有这方面知识基础的朋友慎重下载哪，免得浪费精力撒。主成分分析，基于matlab的程序源代码，拿来既可以用的
- 2021-05-06下载
- 积分：1
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SVD奇异矩阵分解在推荐系统中的应用python源码
SVD奇异矩阵分解在推荐系统中的应用python源码，感谢原作者。SVD的python实现，具体参考http://www.cnblogs.com/FengYan/archive/2012/05/06/2480664.html
- 2020-06-27下载
- 积分：1
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MicroElectronic Circuit Design
微电子电路设计第五版,Richard C. Jaeger, Traveis N. Blalock编著。FIETH EDITIONMICROELECTRONICHM-M- CIRCUIT DESIGNRICHARD C. JAEGERAuburn UniversityTRAVIS N. BLALOCKUniversity of VirginiaMcGrawEducationGrawEducationMICROELECTRONIC CIRCUIT DESIGN. FIFTH EDITIOPublished by McGraw-Hill Education, 2 Penn Plaza, New York, NY 10121 CopyrightC 2016 by McGraw-Hill EducationAll rights reserved. Printed in the United States of America. Previous editions 2011, 2008, and 2004. No part of thispublication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system,without the prior written consent of McGraw-Hill Education, including, but not limited to, in any network or otherelectronic storage or transmission, or broadcast for distance learninSome ancillaries, including electronic and print components, may not be available to customers outside the United StatesThis book is printed on acid-free pape1234567890DOw/DOw1098765ISBN978-0-07-352960-8MHID0-07-352960-5sident Products markets Kurt LVice President, General Manager, Products Markets: Marty Langece President, Content Design Delivery: Kimberly Meriwether DavidManaging director: Thomas TimpGlobal Publisher Raghu srinivasanDirector. Prodrelopment: RoDirector, Digital Content Development: Thomas Scaife, Ph DProduct develoVincent brashMarketing manager: Nick Mc faddenDirector, Content Design Delivery: Linda avenariusProgram meSchillingContent Project Managers: Jane Mohr, Tammy Juran, and Sandra M. SchneeBuyer: Jennifer PickelDesign: Studio Montage, St Louis, MOContent Licensing Specialist: DeAnna DausenerCompositor: MPS LimitedPrinter.R. DonnellAll credits appearing on page or at the end of the book are considered to be an extension of the copyright pageLibrary of Congress Cataloging-in-Publication DataJaeger. Richard cMicroelectronic circuit design/Richard C. Jaeger, Auburn University,Travis N. Blalock, University of Virginia. --Fifth editionpages cmIncludes bibliographical references and indexISBN978-0-07-352960-8(alk. paper)-ISBN0-07-338045-8(alk. paper)d 1. Integrated circuits--Design and construction. 2. Semiconductors--Design and construction. 3. Electronic circuitesign. I. Blalock, Travis N. Il. TitleTK7874.J3332015621.3815-dc232014040020The Internet addresses listed in the text were accurate at the time of publication. The inclusion of a website does not indicatean endorsement by the authors or McGraw-Hill Education, and McGraw-Hill Education does not guarantee the accuracy ofthe information presented at these siteswww.mhhe.comTOTo Joan, my loving wife and life long partnerRichard C. JaegerIn memory of my father, Professor Theron vaughnBlalock, an inspiration to me and to the countlessstudents whom he mentored both in electronicdesign and in life.Travis n blalockBRIEF CONTENTSPreface xxChapter-by-Chapter Summary XXV12 Operational Amplifier Applications 685PART ONE13 Small-Signal Modeling and LinearSOLID-STATE ELECTRONICS AND DEVICESAmplification 77014 Single-Transistor Amplifiers 8411 Introduction to Electronics 32 Solid-State Electronics 4115 Differential Amplifiers and Operational Amplifier3 Solid-state Diodes and Diode circuits 72Design 9524 Field-Effect Transistors 14416 Analog Integrated Circuit Design Techniques 10315 Bipolar Junction Transistors 21517 Amplifier Frequency Response 111318 Transistor Feedback Amplifiers andPART TWOOscillators 1217DIGITAL ELECTRONICSAPPENDICES6 Introduction to Digital Electronics 2837 Complementary MOS (CMOS) Logic Design 359A Standard Discrete Component Values 12918 MOS Memory Circuits 414B Solid-State Device Models and sPIce simulationParameters 12949 Bipolar Logic Circuits 455C TWo-Port Review 1299PART THREIndex 1303ANALOG ELECTRONICS10 Analog Systems and Ideal OperationalAmplifiers 51711 Nonideal Operational Amplifiers and FeedbackAmplifier Stability 587CONTENTSPreface xxCHAPTER 2Chapter-by-Chapter Summary XXVSOLID-STATE ELECTRONICS 41PART ONE2.1 Solid-State Electronic materials 432.2 Covalent bond model 44SOLID-STATE ELECTRONICS2.3 Drift Currents and mobility inAND DEVICES 1Semiconductors 472.3.1 Drift Currents 47CHAPTER 12.3.2 Mobility 48INTRODUCTION TO ELECTRONICS 32.3.3 Velocity Saturation 482.4 Resistivity of Intrinsic Silicon 491.1 A Brief History of Electronics: From2.5 Impurities in Semiconductors 50Vacuum Tubes to Giga-Scale Integration 52.5.1 Donor Impurities in silicon 511.2 Classification of Electronic Signals 82.5.2 Acceptor Impurities in Silicon 511.2.1 Digital signals 92.6 Electron and hole concentrations in1.2.2 Analog Signals 9Doped semiconductors 511.2.3 A/D and D/A Converters--Bridging2.6.1Type Material (ND >NA)52the analog and Digital2.6.2 p-Type Material (N,A>ND)53Domains 102.7 Mobility and Resistivity in Doped1.3 Notational conventions 12Semiconductors 541.4 Problem-Solving Approach 132.8 Diffusion currents 581.5 Important Concepts from Circuit2. 9 Total Current 59Theory 152.10 Energy Band Model 601.5.1 Voltage and current Division 152.10.1 Electron-Hole pair generation in1.5.2 Thevenin and norton circuitan intrinsic semiconductor 60Representations 162.10.2 Energy Band Model for a Doped1.6 Frequency Spectrum of ElectronicSemiconductor 61Signals 212.10.3 Compensated semiconductors 611.7 Amplifiers 222.11 Overview of Integrated circuit1.7.1 Ideal operational amplifiers 23Fabrication 631.7.2 Amplifier Frequency Response 25Summary 661.8 Element Variations in Circuit Design 26Key Terms 671.8.1 Mathematical modeling ofReference 68Tolerances 26Additional Reading 681.8.2 Worst-Case Analysis 27Problems 688.3 Monte Carlo analysis 291.8.4 Temperature Coefficients 32CHAPTER 31.9 Numeric Precision 34SOLID-STATE DIODES AND DIODE CIRCUITS 72Summary 34Key Terms 353.1 The pn Junction Diode 73References 363.1.1 pn Junction Electrostatics 73Additional Reading 363.1.2 nternal diode currents 77Problems 363.2 The i-v Characteristics of the diode 78VIllContents3.3 The Diode Equation: A Mathematica3.15 Full-Wave Bridge Rectification 123Model for the diode 803.16 Rectifier Comparison and Design3.4 Diode Characteristics under reverse, ZeroTradeoffs 124and forward bias 833.17 Dynamic Switching Behavior of the Diode 1283.4.1 Reverse bias 833.18 Photo diodes, solar cells, and3. 4.2 Zero bias 83Light-Emitting Diodes 1293.4.3 Forward Bias 843.18.1 Photo diodes and3.5 Diode Temperature Coefficient 86Photodetectors 1293.6 Diodes under reverse bias 863.18.2 Power Generation from Solar Cells 1303.6.1 Saturation Current in real3.18. 3 Light-Emitting Diodes(LEDs)13Diodes 87Summary 1323.6.2 Reverse Breakdown 89Key Terms 1333.6.3 Diode model for the breakdownReference 134Region 90Additional Reading 1343.7 pn Junction Capacitance 90Problems 1343.7.1 Reverse bias 903.7.2 Forward Bias 91CHAPTER 43.8 Schottky Barrier Diode 933.9 Diode SPICE Model and layout 93FIELD-EFFECT TRANSISTORS 1443.9.1 Diode Layout 944.1 Characteristics of the MOS Capacitor 1453.10 Diode Circuit Analysis 954.1.1 Accumulation Region 1463.10.1 Load-Line Analysis 964.1.2 Depletion Region 1473.10.2 Analysis Using the Mathematical4.1.3 Inversion Region 147Model for the diode 974.2 The nmos transistor 1473.10.3 The Ideal diode model 1014.2.1 Qualitative i-v Behavior of the3.10.4 Constant Voltage Drop Model 103NMOS Transistor 1483.10.5 Model Comparison and4.2.2 Triode Region Characteristics ofDiscussion 104the nmos transistor 1493.11 Multiple-Diode Circuits 1054.2.3 On Resistance 1523.12 Analysis of Diodes Operating in the4.2.4 Transconductance 153Breakdown Region 1084.2.5 Saturation of the i-v3.12.1 Load-Line Analysis 108Characteristics 1543.12.2 Analysis with the Piecewise4.2.6 Mathematical model in theLinear model 108Saturation (Pinch-off)3.12.3 Voltage regulation 109Region 1553.12.4 Analysis Including Zener4.2.7 Transconductance in saturation 156Resistance 1104.2.8 Channel-Length Modulation 1563.12.5 Line and Load Regulation 1114.2.9 Transfer characteristics and3.13 Half-Wave Rectifier Circuits 112Depletion-Mode MosFETs 1573.13.1 Half-Wave Rectifier with resistor4.2.10 Body Effect or SubstrateLoad 112Sensitivity 1593.13.2 Rectifier Filter Capacitor 1134.3 PMOS Transistors 1603.13.3 Half-Wave Rectifier with rc load 1144.4 MOSFET Circuit Symbols 1623. 13.4 Ripple Voltage and Conduction4.5 Capacitances in MOS Transistors 165Interval 1154.5.1 NMOs Transistor Capacitances in3.13.5 Diode Current 117the Triode region 1653.13.6 Surge Current 1194.5.2 Capacitances in the Saturation3.13.7 Peak-Inverse-Voltage(PlV)Rating 119Region 1663.13.8 Diode Power Dissipation 1194.5.3 Capacitances in Cutoff 1663.13.9 Half-Wave Rectifier with Negative4.6 MOSFET Modeling in SPICE 167Output Voltage 1204.7 MOS Transistor Scaling 1683.14 Full-Wave Rectifier Circuits 1224.7.1 Drain Current 1693. 14.1 Full-Wave Rectifier with Negative4.7.2 Gate Capacitance 169Output Voltage 1234.7.3 Circuit and power densities 169ContentsIX4.7.4 Power-Delay Product 1705.3 The pnp Transistor 2234.7.5 Cutoff Frequency 1705.4 Equivalent Circuit Representations for the4.7.6 High Field Limitations 171Transport Models 2254.7.7 The unified mos transistor model5.5 The i-v Characteristics of the bipolarIncluding High Field Limitations 172Transistor 2264.7.8 Subthreshold conduction 1735.5.1 Output Characteristics 2264.8 MOs Transistor Fabrication and layout5.5.2 Transfer characteristics 227Design Rules 1745.6 The Operating Regions of the Bipolar4.8.1 Minimum Feature size andTransistor 227Alignment Tolerance 1745.7 Transport Model Simplifications 2284.8.2 Mos Transistor Layout 1745.7.1 Simplified Model for the Cutoff4.9 Biasing the NMOS Field-EffectRegion 229Transistor 1785.7.2 Model Simplifications for the4.9.1 Why Do We Need Bias? 178Forward-Active Region 2314.9.2 Four-Resistor Biasing 1805.7.3 Diodes in Bipolar Integrated4.9.3 Constant Gate-Source VoltageCircuits 237Bias 1845.7.4 Simplified Model for the4.9.4 Graphical analysis for theReverse-Active Region 238Q-Point 1845.7.5 Modeling Operation in the4.9.5 Analysis Including Body Effect 184Saturation Region 2404.9.6 Analysis Using the Unified5.8 Nonideal Behavior of the bipolarModel 187Transistor 2434.10 Biasing the PMos Field-Effect Transistor 1885.8.1 Junction Breakdown Voltages 2444.11 The junction Field-Effect Transistor5.8.2 Minority-Carrier Transport in theUFET190Base Region 2444.11.1 The JFET With Bias Applied 195.8.3 Base Transit time 2454.11.2 JFET Channel with Drain-Source5.8.4 Diffusion Capacitance 247Bias 1935.8.5 Frequency Dependence of the4.11.3 n-Channel jfet i-v Characteristics 193Common-Emitter current gain 2484.11.4 The p-Channel JFET 1955.8.6 The Early Effect and Early4.11.5 Circuit Symbols and JFET ModelVoltage 248Summary 1955.8.7 Modeling the Early Effect 2494.11.6 JFET Capacitances 1965.8.8 Origin of the Early Effect 2494.12 JFET Modeling in Spice 1965.9 Transconductance 2504.13 Biasing the JFET and Depletion-Mode5.10 Bipolar Technology and sPiCe Model 251MOSFET 1975.10.1 Qualitative Description 251Summary 2005.10.2 SPICE Model Equations 252Key Terms 2025.10.3 High-Performance BipolarReferences 202Transistors 253Problems 2035.11 Practical bias circuits for the bjt 2545.11.1 Four-Resistor bias network 256CHAPTER 55.11.2 Design Objectives for theBIPOLAR JUNCTION TRANSISTORS 215Four-Resistor bias network 2585.11.3 terative Analysis of the5.1 Physical Structure of the BipolarFour-Resistor bias circuit 262Transistor 2165.12 Tolerances in bias circuits 2625.2 The Transport Model for the npn5. 12.1 Worst-Case Analysis 263Transistor 2175. 12.2 Monte Carlo Analysis 2655.2.1 Forward Characteristics 218Summary 2685.2.2 Reverse Characteristics 220Key Terms 2705.2.3 The Complete Transport ModelReferences 270Equations for Arbitrary BiasProblems 271Conditions 221
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