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ialm_rpca背景建模
本代码用python实现RPCA背景建模,RPCA的优化采用非精确增广拉格朗日乘子法( the inexact augmented Lagrange multiplier)
- 2021-05-06下载
- 积分：1
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matlab-bgl工具箱
解决复杂网络度、度分布、介数、网络效率等以及不同攻击模式下的网络参数计算与图表
- 2020-12-05下载
- 积分：1
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用verilog编写的sigma-delta adc例子
用verilog编写的sigma-delta adc例子
- 2020-12-07下载
- 积分：1
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华为FusionInsight HD 2.7 技术白皮书.pdf
华为FusionInsight HD 2.7 技术白皮书，详细介绍了华为版Hadoop的各个组件功能。华为FusionInsight是华为企业级大数据存储、查询、分析的统一平台。华为 Fusionlnsight hd27技术白皮书日录目录1简介…1.1 Fusionlnsight hD概述1.2 FusionInsight HD组件介绍.2重点组件介绍52.集群管理 Manager622分布式文件系统HDFS23统一资源管理和调度框架YARN24分布式批处理引擎 Mapreduce.25分布式数据库 HBase2.6数据仓库组件Hive27分布式内存计算引擎 Spark28全文检索组件Solr.29批量数据集成 Loader( Scoop)….122.10实时数据采集 Flume142.11流式事件处理( Storn)…2.11.1 Storm2.11.2 StreamCQL…2.11.3 Flink2.12分布式高速缓存 Redis2.|3分布式消息队列 Kafka2.14作业编排与调度 Oozie...........212.15数据继承入凵Hue文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 Fusionlnsight hd27技术白皮书1简介简介1.1 FusionInsight HD概述1.2 FusionInsight hD组件介绍文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 FusionInsight hd27技术白皮书1简介11 FusionInsight hD概述FusionInsight是华为仝业级大数据存储、查询、分析的统一平台,能够帮助全业快速构建海量数据信息处理系统,通过对巨量信恳数据实吋与非实时的分析挖掘,发现全新价值点和企业商机应用层REST API数据服务明细影像推荐/伪控关系轨迹Data世像ServiceREST API/SQL/SDKloaderMe知认FormerManager数据分析Data Farm数据集成信数据挖识、服务框智慧配置管理性能管理告警管理数据处理发全管理DataoS hadoop Spark2 STORM(Flink LibrA租户管理灾备管理FusionInsigh解决方案由5个子产品 FusionInsight hD、 Fusioninsight libra、FusionInsight miner、 FusionInsight Farmer和1个操作运维系统 FusionInsight manager构成FusionInsight HD:企业级的大数据处理环境,是一个分布式数据处理系统,对外提供大容量的数据存储、分析查询和实时流式数据处理分析能力。usionInsight HD包括 Zookeeper、 Hadoop、 HBase、 Loader、 HBase、Hive、Hue、 Oozie、 Phoenix、Solr、 Redis、 Spark、 Streaming、 Kafka、E、 Flink等组件。FusionInsight miner:个业级的数据分析平台,基于华为 FusionInsight hd的分布式存储和并行计算技术,提供从海量数据中挖掘出价值信息的平台。FusionInsight Farmer:企业级的大数据应用容器,为企业业务提供统一开发、运行和管埋的平台。Fusionlnsight Manager:企业级大数据的操作运维提供,提供高可靠、安全、容错、易用的集群管理能力,支持大规模集群的安装部署、监控、告警、用户管理、权限管理、审计、服务管理、健康检査、问题定位、升级和补丁等功能FusionInsight librA:企业级的MPP关系型数据库,基于列存储和MPP架构,是为面向结构化数据分析而设计开发的,能够有效处理PB级别的数据量。 FusionInsightLibrA在核心技术上跟传统数据库有巨大差别,可以解决很多行业用户的数据处理性能问题,可以为超大规模数据管理提供高性价比的通用计算平台,并可用于支撑各类数据仓库系统、BⅠ( Business intelligence)系统和决策支持系统,统一为上层应用的决策分析等提供服务。文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 FusionInsight hd27技术白皮书1简介12 FusionInsight hD组件介绍数招外析数据集成菜群理款据挖握数据挖掘处理Mahout(on MRMI I ib(on Spark)ahx款什理作业调应DSL领域描述语U。2e枇处互询KV面流式杏诈HiveparksQLRedisStreamcQL批量分市式计算引Loade故障管卫七处理流处理附件处理MapReduceFlinkstorm实时采性能管理分布式资源管Y消思队列安仝售翅Kalka分布式存储雪NOSQL数招库按素引≤QL行惴格式租户管理上传下载FtnonHDFSOROPalyueLCai bun De莫分布式文件系统备份曾理HDFSFusionInsight hd需要对廾源组件进行封裝和增强,对外提供稳定的大容量的数据存储、查询和分析能力。各自组件提供功能如下Manager:作为运维系统,为 I FusionInsight hD提供高可靠、安全、容错、易用的集群管理能力,支持大规模集群的安装/级/补丁、配置管理、监控管理、告警管理、用户管理、租户管理等。HDFS: Hadoop分布式文件系统( Hadoop Distributed File System),提供高吞吐量的数据访问,适合大规模数据集方面的应用。HBase:提供海量数据存储功能,是一种构建在HDFS之上的分布式、面向列的存储系统。Oozie:提供了对开源 Hadoop组件的任务编排、执行的功能。以 Java Web应用程序的形式运行在 Java servlet容器(如: Tomcat)中,并使用数据库来存储工作流定义、当前运行的工作流实例(含实例的状态和变量)。Zookeeper:提供分布式、高可用性的协调服务能力。帮助系统遷免单点故障,从而建立可靠的应用程序Redis:提供基于内存的高性能分布式KV缓存系统。Yarn: Hadoop2.0中的資源管理系统,它是一个通用的资源模块,可以为各类应用程序进行资源管理和调度。Mapreduce:提供快速并行处理大量数据的能力,是一种分布式数据处理模式和执行环境。Spark:基于内存进行计算的分布式计算架Hive:建立在 Hadoop基础上的井源的数据仓库,提供类似SQL的HⅤeQL语言操作结构化数据存储服务和基本的数据分析服务。Loader:基 J Apache Scoop实巩 FusionInsight hD与关系型数据库、p/sp文件服务器之间数据批量导入导出工具:同时提供 Java api/ shell!务调度接口,供第三方调度平台调用。●Hue:提供了开源 Hadoop绀件的 WebUI,可以通过浏览器操作HDFS的目录和文件,调用 Oozie米创建、监控和编排工作流,可操作 Loader组件,査看Zo< eeper集群情况。文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 FusionInsight hd27技术白皮书1简介Flume:一个分布式、可靠和高可用的海量日志聚合系统,支持在系统中定制各类数据发送方,用于收集数据;同时,Fume提供对数据进行简单处理,并写入各种数据接受方(可定制)的能力。●Solr:一个髙性能,基于 Lucene的全文检索服务器。Solr对 Lucene进行了扩展,提供比 Lucene更为肀富的查询语言,同时实现」可配置、可扩展,并对查询性能进行了优化,并且提供了一个完善的功能管理界面,是一款非常优秀的全文检索引擎Kafka:一个分布式的、分区的、多副本的实时消息发布-订阅系统。提供可护展、扃吞吐、低延迟、高可靠的消息分发服务Storm:一个分布式、可靠、容错的实时流式数据处理的系统,并提供类SQLtreaInCQL)的查询语言Fink:分布式的、高可用的、能保证 Exactly Once语义的针对流数据和批数据的处理引擎SparkSQL:基于 Spark引擎的高性能SQL引擎,可与Hive实现元数据共享。Mahaut:提供基于 Mapreduce的数据挖掘算法库MLLib:提供基于 Spark的数据挖掘算法库phx:提供基于 Spark的图处理算法库文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 Fusionlnsight hd27技术白皮书2重点组件介绍2重点组件介绍21集群管理 Manager22分布式文件系统HDFS2.3统一资源管理和调度框架YARN24分布式批处理引擎 MapReduce2.5分布式数据库 HBase2.6数据仓库组件Hive27分布式内存计算引擎 Spark28全文检索组件Solr2.9批量数据集成 Loader( Scoop)210实时数据采集 Flume2.ll流式事件处理( Storm)212分布式高速缓存 Redis213分布式消息队列 Kafka2.14作业编排与调度 Oozie2.15数据继承入口Hue文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 Fusionlnsight hd27技术白皮书2重点组件介绍21集群管理 ManagerManager是 FusionInsight H的运维管理系统,为部署在集群内的服务提供统一的集群管理能力。 Manager支持大规模集群的安裝部署、性能监控、告警、用户管理、权限管理、审计、服务管理、健康检査、日志采集、升级和补丁等功能图2-1 Manager逻辑架构w已妇UP SereIAMCEPPMS匚就动aLdapOM M AgentNode AgentNTP ClerDHTLFusionInsight ManagerFusionInsight Manager由OMS和 NodeAgent组成:●OMS:操作维护系统的管理节点,OMS·般有两个,互为主备。NodeAgen:操作维护系统中的所有被管理节点,每个节点上一个。表2-1业务模块说明模块名称描述Web Service是一个部署在 Tomcat下的web服务,提供 Manager的htts:接口,用于通过浏览器访问 Manager。同时还提供基于 Syslog和SNMP协议的北向接入能力ControllerManager的控制中心,负责汇聚来自集群中所有节点的信息,统一问管理员展示,以及负责接收来自管理员的操作指令,并且依据操作指令所影响的范围,向集群的所有相关节点同步信息nodeAgent存在于每一个集群节点,是 Controller对部署在该节点上组件做切操作的代理。代表本节点上部署的所有组件与 Controller交互,实现整个集群多点到单点的汇聚IAM负责记录审计日志。在 Manager的U上每一个非查询类操作,都有对应的审计日志文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司华为 Fusionlnsight hd27技术白皮书2重点组件介绍模块名称描述PMS性能监控模块,搜集每一个OMA上的性能监控数据并提供査询CEP汇聚功能模块。比如将所有OMA上的磁盘已用空间汇总成一个性能指标FMS告警模块,搜集每一个OMA上的告警并提供查询OMMAgent各节点上面性能监控和告警的Agen,负责收集该 Agent Node上的性能监控数据和告警数据CAS统一认证中心,登录 Web service时需要在CAS进行脊录认证,浏览器通过URL自动跳转访问CASAOS权限管理模块,管理用户和用户组的权限OMS Kerberos提供单点登录及 Controller与 Nodc agent间认证的功能OMS Ldap在集群安装前为用广认证提供数据仔储,在集群安装后作为集群中Ldap的备份DatabaseManager的数据库,负责存储配置、监控、告警等信息NTP负责集群内部各节点与OMS节点之向的时钟同步和OMS节点与外部时钟源之间的时钟同步。22分布式文件系统HDFSHDFS是 Hadoop的分布式文件系统,实现大规模数据叮靠的分布式读写。HDFS针对的使用场景是数据读写具有“一次写,多次读”的特征,而数据“写”操作是顺序写,也就是在文件创建时的写入或者在现有文件之后的添加操作。HDHS保证一个文件在个时刻只被一个调用者执行写操作,而可以被多个调用者执行读操作。图2-2分布式文件系统HDFSHDFS ArchitectureMetadata(Name, re)Metadata. opsNamenode/home/foo/data. 3Black opsRead DatanodesDatanodesReplicationBlocksRack 1WriteRack 2文档版本01(2017-07-30)华为专有和保密信息版权所有c华为技术有限公司
- 2020-12-07下载
- 积分：1
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数学建模论文1992-2011年全部优秀论文与点评
数学建模历届论文，不容错过，里面大概有40多篇论文，还有很多点评，想在数学建模中取得好成绩，那就快来学习吧。肯定不会让您失望的。一切都等着你，还等什么，希望能为你们在数学建模方面带来很大的帮助。
- 2020-12-09下载
- 积分：1
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cifar-10-batches-py.zip
做cs231n时候的作业上使用到的机器学习分类数据集。国内下载速度巨慢，而且还需要使用linux系统才能运行那个脚本，因此直接贴在CSDN上。The CIFAR-10 and CIFAR-100 are labeled subsets of the 80 million tiny images dataset. They were collected by Alex Krizhevsky, Vinod Nair, and Geoffrey Hinton.The CIFAR-10 datasetThe CIFAR-10 dataset consists of 60000 32x32 co
- 2019-12-29下载
- 积分：1
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基于Contourlet变换的图像去噪源代码
基于Contourlet变换的图像去噪源代码
- 2020-12-02下载
- 积分：1
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Java&SQL学生学籍管理系统
Java开发，基于SQLServer的学生学籍管理系统，包括学生信息、课程信息、成绩的增删改、查询功能。简洁易懂。
- 2021-05-06下载
- 积分：1
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锁相环simulink仿真
自己用simulink做的PLL仿真，需要的同志们可以看一下，互相交流
- 2020-12-06下载
- 积分：1
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altera公司IP核使用手册.PDF
altera公司IP核使用手册,对于学习EDA技术的学生或工程师有用A吉RAContentsChapter 1. About this MegaCore FunctionRelease informat1-1Device Family Support···Introduction.··········FeaturesOpen core plus evaluation1-3Performance···Chapter 2. Getting StartedDesign Flow衡·鲁·,看·,音番2-1Megacore Function walkthrough2-2Create a New quartus II Pi2-2Launch the mega Wizard Plug-in ManagerStep 1: Parameterize2-5Step 2: Set Up SimulationStep 3: Generate..,2-11Simulate the design2-13Compile the design2-13Pa Device2-14Set Up Licensing2-15ppend the license to yourdat file2-15Specify the License File in the Quartus II Software...2-15Example Simulation and Compilation..2-16Example quartus Ii project2-16Example simulation with Test Vectors,,,,,,2-16Chapter 3. SpecificationsyperTransport Technology Overview1HT SyStems3-2HT Flow ControlHyper Transport MegaCore Function SpecificationPhysical InterfaceSynchronization and alignment ...Protocol interfClocking Options.......HyperTransport Mega Core Function Parameters and HT Link Performance3-10Signals3-14CSR Module...3-31OpenCore plus time-Out BehaviorAppendix A. ParametersIntroduction鲁鲁鲁A-1Parameter listsDevice Family and Read Only registers···········,,,,,,,,,,A-1Base Address Registers番鲁,A-2Clocking OptionsA-3Advanced settingso March 2009 Altera corporationHyperTransport MegaCore Function User GuideAppendix B. Stratix Device Pin AssignmentsIntroductionB-1GuidelinesAppendix C. Example designGeneral descriptionAdditional informationRevision historyInto-lHow to Contact alteraInfo-1Typographic Conventions ..........Info-2Hyper Transport MegaCore Function User Guideo March 2009 Altera CorporationA吉RA1. About this MegaCore FunctionRelease InformationTable 1-1 provides information about this release of the Hyper Transport Mega CoretfunctioTable 1-1. Hyper Transport Mega Core Function Release InformationitenlDescription∨ ersion9.0Release dateMarch 2009Ordering codeIP-HTProduct ID(s)0098Vendor iD(s)6AF7Altera verifies that the current version of the quartus@ll software compiles theprevious version of each MegaCore function. Any exceptions to this verification arereported in the Mega Core lP Library release Notes and Errata. Altera does not verifycompilation with Mega Core function versions older than one releaseDevice Family SupportMegaCore functions provide either full or preliminary support for target Alteradevice families:Full support means the Mega Core function meets all functional and timingrequirements for the device family and may be used in production designsa Preliminary support means the Mega Core function meets all functionalrequirements, but may still be undergoing timing analysis for the device family;itmay be used in production designs with cautionTable 1-2 shows the level of support offered by the Hyper Transport MegaCorefunction for each of the altera device familiesTable 1-2. Device Family SupportDevice FamilySupportHard Copy Stratix@FullStratixFulStratix IIFulStratix‖GXPreliminaryStratix GXOther device familiesNo supportC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide1-2Chapter 1: About this MegaCore FunctionIntroductionIntroductionThe Hyper Transport Mega Core function implements high-speed packet transfersbetween physical(PhY) and link-layer devices, and is fully compliant with theHyperTransport l/O Link Specification, Revision 1.03. This Mega Core function allowsdesigners to interface to a wide range of Hyper TransportTm technology(hT)enableddevices quickly and easily, including network processors, coprocessors, videochipsets, and ASICsFeaturesThe Hyper Transport Mega Core function has the following features8-bit fully integrated hT end-chain interfacePacket-based protocolDual unidirectional point-to-point linksUp to 16 Gigabits per second(Gbps)throughput(8 Gbps in each direction)200, 300, and 400 MHz DDR links in Stratix and Stratix GX devices200, 300, 400, and 500 MHz ddr links in Stratix II and Stratix II GX devicesLow-swing differential signaling with 100-Q2 differential impedanceHardware verified with Hyper fransport interfaces on multiple industry standardprocessor and bridge devicesFully parameterized mega core function allows flexible, easy configurationFully optimized for the altera stratix Il, Stratix, Stratix GX, and Stratix II GXevice famillesApplication-side interface uses the Altera AtlanticTM interface standardManages Hr flow control, optimizing performance and ease of useIndependent buffering for each HT virtual channelAutomatic handling of ht ordering rulesStalling of one virtual channel does not delay other virtual channels(subject toorderingFlexible parameterized buffer sizes, allowing customization depending onsystem requirementsUser interface has independent interfaces for the HT virtual channels, allowingindependent user logic designCyclic redundancy code(crc) generation and checking to preserve data integrityIntegrated detection and response to common HT error conditions■ CRC errorsEnd-chain errorsFully integrated HT configuration space includes all required configuration spaceregisters and HT capabilities list registersHyper Transport MegaCore Function User Guideo March 2009 Altera CorporationChapter 1: About this MegaCore FunctionPerformance32-bit and 64-bit support across all base address registers bars)automatically handles all csr space accessesVerilog HDL and VHdL simulation supportOpen Core Plus EvaluationWith the Altera free Open Core Plus evaluation feature, you can perform the followingSimulate the behavior of a mcgafunction(Altera MegaCore function or AMPPmegafunction) within your systema Verify the functionality of your design, as well as quickly and easily evaluate itssize and speedGenerate time-limited device programming files for designs that includeMegaCore functionsProgram a device and verify your design in hardwareYou only need to purchase a license for the Mega Core function when you arecompletely satisfied with its functionality and performance and want to take yourdesign to productiono For more information about Open Core Plus hardware evaluation using theHyperTransport MegaCore function, refer to"Open Core Plus Time-Out Behavior"onpage 3-40 and AN 320: Open Core Plus Evaluation of megafunctionsPerformanceThe Hyper Transport Mega Core function uses 20 differential I/O pin pairs and 2single-ended I/O pins, requiring 42 pins total. Table 1-3 through Table 1-5 showtypical performance and adaptive look-up table (alut) or logic element (LE)usagefor the HyperTransport MegaCore function in Stratix II GX, Stratix IL, Stratix, andStratix GX devices respectively, using the Quartus@ II software version 7.1Table 1-3 shows the maximum supported data rates in megabits per second(Mbps)by device family and speed gradeTable 1-3. Maximum Supported Hyper Transport Data Rates (Note 1)Speed GradeDevice Family-36Stratix ll GX devices 1000 Mbps 1000 Mbps 800 MbpsNA(2)N/A(2NA(2)Stratix devices1000 Mbps 1000 Mbps 800 Mbps N/A(2)NA(2)NA(2)Stratix devicesN/A(2N/A(2)00 Mbps 800 Mbps 600 Mbps400 MbpsFlip-Chip packagesStratix devicesNA(2)NA(2)NA(2)600 Mbps400 Mbps400 Mbps(Wire Bond packagesStratix GX devicesN/A(2) N/A(2)800 Mbps 800 Mbps 600 Mbps N/A(2)Notes to table 1-3(1)Rates are per interface bit. Multiply by eight to calculate the uni-directional data rate of an 8-bit inter face(2) Devices ot this speed grade are not ottered in this device familyC March 2009 Altera CorporationHyperTransport Mega Core Function User GuideChapter 1: About this MegaCore FunctionPerformanceTable 1-4 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix II and Stratix II GX devicesTable 1-4. Hyper Transport Mega Core Function Performance in Stratix ll and Stratix ll GX DevicesParametersMemoryUserRXCombinationalHT Link InterfacePosted Non-Posted Response ClockingALUTSLogicfMAX(MHz) MAx(MHz)Buffers BuffersBuffers Option(12)Registers M4K M512 ( 3)3)Shared3.5005200120500125(4RX/TX/Ref35005200500Ref/x8Shared36005400160500>150RX/TXShared4.0006,00016150RX/TX16Shared4,1006,200500125(4)RX/TX/RefShared4.1006200500125(4Ref/TxShared4.2006400160150RX/TXNotes to table 1-4.Refer to " Clocking Options "on page 3-7 for more information about these options(2 )Other parameters(BAR configurations, etc. )vary the alut and Logic Register utilization numbers by approximately +/-200(3)Figures for -3 speed grade devices only(4) When using the Shared Rx/Tx/Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the ht frequency divided byTable 1-5 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix and Stratix GX devicesTable 1-5. Hyper Transport Mega Core Function Performance in Stratix and Stratix GX DevicesUser Interface fmaxParametersUtilizationHT Link fMAX MHz)MHZ)RXRXSpeed GradePosted Non-Posted Response Clocking Option LEsM4KBuffers BuffersBuffers)(2 Blocks.5-66Shared rx/tx/ref1240010073)100734448888Shared Ref/Tx 7, 60014400400100{3)100(3)Shared rxtx7,90016400400>125>100Shared rxtx8.900125>100168Shared Rx/T×Ref9,400124004001003)100316Shared ref/ ix9.500144001003)10073)16Shared rx/x9.700400125Notes to table 1-5:(1)Refer to Clocking Options"on page 3-7 for more information about these options(2 )Other parameters( BAR configurations etc. )vary the LE utilization by approximately +/-200 LES(3 )When using the Shared Rx/Tx/ Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the hT frequency divided by fourHyper Transport MegaCore Function User GuideC March 2009 Altera CorporationA吉RA2. Getting StartedDesign FlowTo evaluate the HyperTransport Mega Core function using the Open Core Plus feature,include these steps in your design flowObtain and install the HyperTransport Mega Core functionThe HyperTransport Mega Core function is part of the MegaCore IP Library, which isdistributed with the Quartus ii software and downloadable from the altera websitewww.altera.como For system requirements and installation instructions, refer to Quartus II InstallationLicensing for Windows and Linux Workstations on the Altera website atwww.altera.com/literature/lit-qts.ispFigure 2-1 shows the directory structure after you install the HyperTransportMegaCore function, where is the installation directory. The default installationWindows is C: altera ; on Linux it islopt/alteraFigure 2-1. Directory StructureInstallation directorypContains the Altera MegaCore IP Library and third-party IP coresalteraContains the Altera MegaCore IP LibrarycommonContains shared componentshtContains the Hyper Transport Hyper Transport Megacore function files and documentationdocContains the documentation for the Hyper Transport MegaCore functionlibContains encrypted lower-level design filesexampleContains the design example for the Hyper Transport Mega Core function2. Create a custom variation of the Hyper Transport Mega Core function3. Implement the rest of your design using the design entry method of your choice4. Use the IP functional simulation model to verify the operation of your designo For more information about Ip functional simulation models, refer to the SimulatingAltera IP in Third-Party Simulation Tools chapter in volume 3 of the Quartus II Handbook5. Use the Quartus II software to compile your designC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide2-2Chapter 2: Getting StartedMega Core Function WalkthroughIg You can also generate an Open Core Plus time-limited programming file,which you can use to verify the operation of your design in hardware6. Purchase a license for the hypertransport Mega Core functionAfter you have purchased a license for the Hyper transport mega Core functionfollow these additional steps1. Set up licensing2. Generate a programming file for the Altera device(s)on your board3. Program the Altera device(s)with the completed designMegaCore Function WalkthroughThis walkthrough explains how to create a custom variation using the AlteraHyper Transport IP Toolbench and the Quartus II software, and simulate the functionusing an ip functional simulation model and the modelsim software when you arefinished generating your custom variation of the function, you can incorporate it intoⅴ our overall projectIe IP Toolbench allows you to select only legal combinations of parameters, and warnsou of any invalid configurationsIn this walkthrough you follow these stepsCreate a New Quartus II Projecta Launch the MegaWizard Plug-in Manager■Step1: Parameterizea Step 2: Set Up Simulation■Step3: Generate■ Simulate the designTo generate a wrapper file and Ip functional simulation model using default values,omit the procedure described in"Step 1: Parameterizeon page 2-5Create a New Quartus ll ProjectCreate a new Quartus II project with the New Project Wizard, which specifies theworking directory for the project, assigns the project name, and designates the nameof the top-level design entityTo create a new project, perform the following steps1. On the Windows Start menu, select Programs> Altera> Quartus II tostart the Quartus lI software. Alternatively, you can use the Quartus II Web editionsoftware2. In the Quartus II window, on the File menu, click New Project Wizard. If you didnot turn it off previously, the New Project Wizard Introduction page appears3. On the New Project Wizard Introduction page, click NextHyper Transport MegaCore Function User Guideo March 2009 Altera Corporation
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