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基于Xgboost的商业销售预测

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基于Xgboost的商业销售预测，以德国Ｒｏｓｓｍａｎｎ商场的数据为例，通过对数据的探索性分析，以相关背景业务知识体系为基础，通过可视化分析，提取隐含在数据里的特征，使用性能较优的Ｘｇｂｏｏｓｔ方法进行规则挖掘，取得较好效果。第3期饶泓等:基于 Boost的商业销售预测277·(3)eta:收缩步长,即学习速率,取值范围是,3.1数据来源默认为0.3。在更新叶子节点的时候,权重乘以本文所有数据均来自 Haggle中的 Rossmanneta,以避免在更新过程中的过拟合。商店销售额数据集。 Rossmann是商人 Dirk ross(4) max _ depth:每棵树的最大深度,取值范围mann创立的德国首家平价日用品商店,现在的是,默认为6。树越深,越容易过拟合。Rossmann公司逼布欧洲7个国家,分店达100多(5) subsample:训练的实例样本占整体实例样家。论文通过位于德国的1115所 Rossmann连锁本的比例取值范围是(0.1],默认为1。值为0.5商店的历史数据预测未来48天商店的销售额时意味着 Boost随机抽取一半的数据实例来生成Haggle给出了三个数据集: train、test、 store,分树模型,这样能防止过拟合别是训练集测试集和商店基本信息的数据集,对训(6) colsample bytree:在构建每棵树时,列(特练集建模训练,对测试集进行预测。征)的子样本比,参数值的范围是(0,1]数据集基本信息如下(7) objective:默认为reg: linear;(1)训练集 train.csv:时间范围为2013年01月(8)sccd:随机数种子,为确保数据的可重现01日到2015年07月31日,共942天,1017209条性,默认为0。数据。2.2K折交叉验证方法(K一CV(2)测试集test.csv:时间范围为2015年08月论文采用K折交叉验证方法。将原始数据0日到2015年09月17日,共48天,41088条数分为K个子集,每个子集分别验证一次,剩余的K据组子集作为训练数据,这样可得到K组训练集(3)商店基本信息数据集 store.csv:1115条数和测试集以最终的分类平均精度作为性能指标。据,共1115家商店的信息。在实际应用中,K值一般大于或等于2,需要建立K3.2数据的可视化分析及原始特征提取个模型来进行K折交叉验证的实验,并计算K次为了获取影响销售额的基本数据特征,论文对测试集的平均辨识率Gaggle提供的 Rossmann数据集进行了可视化分K折交叉验证的结果能较好说明模型效果,有析,提取原始特征集。效地避免欠拟合与过拟合。在 Boost中,通过(1)顾客数和销售额之间的关系xgb.cv函数来做交叉验证。从图1中可以看出,顾客数和销售额之间存在2.3独热编码(One- hot encoding紧密的正相关关系。由于 Boost仅适用于处理数值型向量,因此处理训练集和测试集时需要将所有其它形式的数10.0据转换为数值型向量,本文采用独热编码将特征值转专换为数值。50独热编码也称一位有效编码,即对于任意时间任意给定的状态,状态向量中只有一位为1,其余6各位为0,将n类特征值转化成n位二进制数串,将顾客数特征的每个对应类设置为1。独热编码将每一个特图1顾客数与销售额的关系曲线征的个取值通过独热编码后转换成了n个二元特(2)促销对销售的影响的可视化分析征,通过该方法将特征转变成稀疏矩阵6。独热编图2和图3中 Promo取1表示当天有促销活码能够解决分类器不好处理属性数据的问题并在动取0表示没有促销活动。从图中可以看出促销一定程度上扩充了特征活动对顾客数并没有太大影响,但销售量却明显提3数据预处理高了,即促销活动并没有吸引更多的顾客,但提高了顾客的购买力,从而提高了销售额。通过查询原始为了获取数据中的有效特征,论文采用探索性数据发现没有促销的情况下顾客平均消费8.94欧数据分析方法对数据进行可视化分析获得数据分元,有促销活动的情况下平均消费10.18欧元布特征,理解原始数据的基本特征,发现数据之间的(3)星期( DayOf Week)对销售影响的可视化分潜在模式.找出数据中的有效特征析21994-2017ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net278南昌大学学报(理科版)2017年40000表2商店薮据基本特征集30000特征名称含义值批20000ore商店号取值:1到1115商店类型10000商店类别分类:逢础类met最近的党争对手的距薮卷:桊商店0离里有761个商店有PromoCompetition-图2促销对销售额的影响Open SinceMonth竞争对手开张的月份月份Open since year竞争对手开张的年份年份数据6000P持续性的促销活动0:无,1:有的4000Prom2 Since Week开始参加Pomo2促销日历上的第几周数的日历周值2000Pomo2 Sincerer开始参加Pm2i年份数据PromoPromoInterval参加Pomn2促销开始Jan,Apr,Jo)e的月份列表Feb, May, Aug, Nov".图3促销对顾客数的影响Mar, Jun, Sept, Dec从图中可以看出,星期日的销售额中位数和上不同的分类特征在训练集和测试集中的比例见四分位数远远高出正常营业日,但是下四分位数却表3~6低于正常营业日,即有些商店星期日营业额高于平表3Open特征取值比例时,但也有一部分商店的销售额低于正常营业日。从图中也可以看出,从周一到周六,周一的销售额偏16.99高一些,星期六的销售额偏低一些test/yo14.5585,4440000表4Prom特征取值比例30000Pramo0凝train61.8538,15批2000test/%50.4239.5810000表5 Stateholiday特征取值比例y星期几1.990.660.40图4销售额在星期1~7中的分布情况test/%99.560.44由于篇幅的关系,对数据的可视化分析不表6 Schoolholiday特征取值比例列岀。根据这些数据的可视化化析,我们提取出如Schoclholiday表1所示和表2所示的训练数据和测试数据原始特test/%55.6544.35征集以及商店数据基本特征集。表1数据原始特征集3.3数据预处理持征名称含义3.3.1数据清洗为获得可训练用数据,我们对原tcre有店号取值:1到1115始数据进行清洗,具体过程如下:DayOfWeek星期几取值:1到7(1)标记异常数据。如商店是开门的,但是销Date时间如2013-01-01Sales销售额数值售额为零的数据为异常数据Customers顾客数数值(2)对训练集的 Sales销售额字段取对数,设置是否开店关店,1:开店为 Saleslog字段;P当天是否有促销0:无促销,1:促销0:非假日,a:公共假日;b:(3)缺失值用一1填充;State Holiday假日复活节,c:圣诞节(4)合并训练集和测试集,添加Set字段,用以SchoclHoliday学校假日0非假日,1:假日分训练集和测试集,值1为训练集,0为测试集;(3)数值化分类特征值。原始数据集中, State21994-2017ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net第3期饶泓等:基于 Boost的商业销售预测holiday分类特征取值为0、a、b、c,无法代入模型计算因此重新编码为0、1、2、3; Store Type分类特4实验结果及分析值为a、b、c、d, Assortment分类特征值为a、b、c,采4.1实验条件用同样方法用整型数据重新编码(1)软件环境(6)分解特征。将原始数据集中Date特征分(a)操作系统: Windows7x64解为 DatcDay、 Datc Wcck、 DatcMonth、 Datc ycar(b)开发平台: Python2.7+R3.4.2DateDay OfYear5个特征(c)第三方库: Python: numpy+ pandas+(7)增加字段 PateNt,即Date转换为整型的 atplotlib I xgboost;R3.4.2库: data table|gg形式lot2tlubridate-zoo-dplyr+scales+xgboost+(8)规范化特征表达。对 Competition- forecast glmnetpen sinceRer和 CompetitionOpenSinceMonth字(2)硬件环境段合并成普通年月的表达,并转化为整型;将Pro处理器:Iner(R)Core(TM)i3-4160CPUcmoZsincc ycar和 Promo2 Since wcck字段合并成普3.60GHz通年月的表达,并转化为整型,增加字段内存:8GBPromo2 SinccInt4.2单 Boost模型()删除偏差大于2.5的异常数据。对特征工程后的所有特征用 Boost模型进行(10)删除存在异常的数据点,如图5所示的异训练,参数如表7所示。常数据。表7单 Boost模型参数25000参数值参数值15000thread500M4M小人Activereg: linear subsamplegrounds20000colsample bytearly stop. round250004.3组合模型0%时你以根据模型的作用将模型分为三类:商店模式模型、数据合并模型、混合模型。商店模式模型:下面采用单个模型是对每个商图5异常数据店进行单独拟合。这类模型关注商店各自的特性,3.3.2特征处理论文根据相关信息背景对数据但是它也错过了可在其他相似商店的模式中获取的进行特征处理:信息(1)增加字段 Competition OpenInt(1)线性模型lm拟合趋势,不带特征交互的(2)添加一些额外的特征,如商店的位置特征 Boost模型拟合残差StoreState发薪日效应特征 PayDay(在一个月的第(2)线性模型lm拟合趋势,带特征交互的Ⅹg个工作日设置特征值为3在随后的两天设置为 boost模型拟合残差2、1)(3)线性模型lm拟合趋势,不同参数值的(3)增加商店平均每天的销售额 Sales PerDay、 glmnet模型拟合残差平均每天的顾客数 CustomersPerDay、平均每天每(4)tslm模型拟合趋势丨季节性,Ⅹ gboost模位顾客的销售额 SalesPerCustomers Per Day作为新型拟合残差。的特征。(5)tslm模型拟合趋势十季节性, glmnet模型(4)增加特征组合,如: store; DayofWeek,拟合残差store: Dayofweek: Promo等等。(6)tslm模型拟合趋势十季节性,Ⅹ gboost模型+ gemnet模型拟合残差。(7)每个商店直接用Ⅹ gboost模型拟合残差。21994-2017ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net·280·南昌大学学报(理科版)2017年这些模型中,含有 Boost模型的模型参数设1.5- A. train-rmspe- B. train-rmspe置如表8,其中模型7中参数 rounds值设为500。1.0-A.validation-rmspe-B validation表8组合 Boost的模型参数0.5参数值0150030004500600075009000参数值RMSPEreg: linear eta0.013C0max _ depth图6在训练集 train和验证集 validation上的 RMSPE值colsamplc bytrcc0.8subsample3.95图7给出了 Boost模型中非组合特征的重要数据合并模型:下列模型使用合并有 store数度得分,从图中可以看出时间类特征和有关竞争对据集和trai训练集的数据集。各个模型的参数设手的特征得分非常髙,这意味着这些特征对模型具置如表9-11有非常大的影响。表9没有特征工程的 Boost模型DateWeek参数参数CompetitionopenIntreg: lineareta0.01SalesperDayPromorounds3000max _depthcolsample bytreesubsampleAssortment 152100000020000003000000F score特征重要度表10有特征工程的 Boost模型图?特征重要度得分参数参数值bjectivereg: linear eta为了对比各模型的泛化效果,我们给出了单类模型(线性模型LM、时间序列线性模型TSLM、基4000subsoIl0.9于 Lasso和 Elastic net正则广义线性模型 glmnet、early stop. round100cclsample bytree极端梯度上升模型ⅹ gboost)和它们之间的组合模型在测试集上 RMSPE值,从而评价模型在测试集表11153个特征十特征交互的 Xgboost模型上的泛化能力。如表13所示参数值参数表13各模型 RMSPE值比较objectivereg: linear etaC.015max depth18模型RMSPE值.20657300CLM一简单的特征处理rounds. 1l.7TSLM+筒单的特征处理cCanvTree0.12751early stop. round100random forest-简单的特征处理glmnet+简单的特征工程3.11974组合模型:通过组合数据合并模型来获取跨多个商Boost十简单的特征工程0.11839店之间共同的特质。模型的残差用商店模式模型中Boost+特征工程Boost+ glmnet+特征工程0.11262的模型来拟合,从而获得每个商店的特质。用Igloos+ glmnet+tslm+lm+特征工程0.1114Gprcomp函数从数据中提取50个主成分,并用Xg从表中可以看出,Ⅹ ghost单模型的能力就优bost模型来拟合、计算残差。模型说明如下:于其它模型,在进行了简单特征工程后, Boost(1)使用线性模型lm拟合趋势,带特征交互的和 gemnet模型相比, Boost模型依然效果更好。glmnet模型+ Boost模型拟合残差,最后我们结合TSLM|LM在处理趋势和季节性上(2)使用tslm拟合趋势和季节性,带特征交互的优势,采用集成方法对 Xgboost+ glmnet进行组的 Boost模型拟合残差。合得出优化模型Ⅹ gboost+ glmnet+tslm+lm+特图6给出模型在训练集和验证集上的 RMSPE征工程, RMSPE值得到较大提升,泛化性能最优的变化过程,横坐标是次数,纵坐标是 RMSPE的值A是人工删除了异常点的数据中的异常数据5结论并没有删除。可以发现在训练集上训练的前500次本论文研究基于 Boost方法对实体零售业销RMSPE的值就迅速的降低到0.2,然后在1750次售额进行预测。论文以德国零售业 Rossmann公就在0.1左右了,可以看出在训练集上效果很好。司1115家实体门店的商场信息和销售数据为薮据21994-2017ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net第3期饶泓等:基于 Boost的商业销售预测281·源,采用 Boost方法对公司销售额进行预测。参考文献通过在特征工程中对原始数据进行特征提取、L1」赵啸彬.基于数据挖掘的零售业销售预测LD.上海:选择和构建,筛选岀用于训练的特征属性;对比Xα上海交通大学.2010boost、随机森林、 GLMNET以及IM、TSIM模型2 CHEN T,HET. Higgs Boson Discovery with boosted等不同方法对销售额的预测结果,表明 Xgboosτ方TreesLCI.JMLR: Workshop and Conference Proceed法无论是训练速度还是在 RMSPE评价标准上都具2015.42:6980有明显的优势。3 ROBERT E. Banfield, Lawrence (. Hall. Kevin WBowyer. W. P. Kegelmeyer, A Comparison of Decision为了进一步提高 Boost预测模型的精度和泛Tree Ensemble Creation Techniques LI]. IEEE Trans-化能力,本文通过大量的特征工程,尝试多种模型的actions on Pattcrn Analysis and machinc intelligence集成学习方法和参数调优,利用 GLMNET和Xg2007,29(1):173-180boost模型拟合残差,并结合IM、TSLM在趋势和[]李航.统计学习方法[M]北京:清华大学出版社,李节性预测的优点,获得组合优化模型。实验表明2012该组合模型在性能上优于单一 Boost预测模型。[5]闻玲·移动平均季节模型在商品销售收入预测中的应这种基于Xⅹ gboost的组合模型不仅适用于对德AJ. Market Modernization, 2010(28):43-45国零售业销售额的预测还可以将此方法应用于国6黄伟陶俊才.一种基于k- means聚类和关监督学习内零售实体业甚至电商平台的销售额预测,对于提的医学图像分割算法[J].南吕大学学报(理科版),2(14,33(1):31-35高商店的运营生产模式、日常管理、价格管理、配送[7 RICE J Mathematical Statics and Data Analysis[M]方式及精准营销具有重要的意义cand Edition, Plymouth: Duxbury Press, 2006: 221-21994-2017ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net

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  • altera公司IP核使用手册.PDF
    altera公司IP核使用手册,对于学习EDA技术的学生或工程师有用A吉RAContentsChapter 1. About this MegaCore FunctionRelease informat1-1Device Family Support···Introduction.··········FeaturesOpen core plus evaluation1-3Performance···Chapter 2. Getting StartedDesign Flow衡·鲁·,看·,音番2-1Megacore Function walkthrough2-2Create a New quartus II Pi2-2Launch the mega Wizard Plug-in ManagerStep 1: Parameterize2-5Step 2: Set Up SimulationStep 3: Generate..,2-11Simulate the design2-13Compile the design2-13Pa Device2-14Set Up Licensing2-15ppend the license to yourdat file2-15Specify the License File in the Quartus II Software...2-15Example Simulation and Compilation..2-16Example quartus Ii project2-16Example simulation with Test Vectors,,,,,,2-16Chapter 3. SpecificationsyperTransport Technology Overview1HT SyStems3-2HT Flow ControlHyper Transport MegaCore Function SpecificationPhysical InterfaceSynchronization and alignment ...Protocol interfClocking Options.......HyperTransport Mega Core Function Parameters and HT Link Performance3-10Signals3-14CSR Module...3-31OpenCore plus time-Out BehaviorAppendix A. ParametersIntroduction鲁鲁鲁A-1Parameter listsDevice Family and Read Only registers···········,,,,,,,,,,A-1Base Address Registers番鲁,A-2Clocking OptionsA-3Advanced settingso March 2009 Altera corporationHyperTransport MegaCore Function User GuideAppendix B. Stratix Device Pin AssignmentsIntroductionB-1GuidelinesAppendix C. Example designGeneral descriptionAdditional informationRevision historyInto-lHow to Contact alteraInfo-1Typographic Conventions ..........Info-2Hyper Transport MegaCore Function User Guideo March 2009 Altera CorporationA吉RA1. About this MegaCore FunctionRelease InformationTable 1-1 provides information about this release of the Hyper Transport Mega CoretfunctioTable 1-1. Hyper Transport Mega Core Function Release InformationitenlDescription∨ ersion9.0Release dateMarch 2009Ordering codeIP-HTProduct ID(s)0098Vendor iD(s)6AF7Altera verifies that the current version of the quartus@ll software compiles theprevious version of each MegaCore function. Any exceptions to this verification arereported in the Mega Core lP Library release Notes and Errata. Altera does not verifycompilation with Mega Core function versions older than one releaseDevice Family SupportMegaCore functions provide either full or preliminary support for target Alteradevice families:Full support means the Mega Core function meets all functional and timingrequirements for the device family and may be used in production designsa Preliminary support means the Mega Core function meets all functionalrequirements, but may still be undergoing timing analysis for the device family;itmay be used in production designs with cautionTable 1-2 shows the level of support offered by the Hyper Transport MegaCorefunction for each of the altera device familiesTable 1-2. Device Family SupportDevice FamilySupportHard Copy Stratix@FullStratixFulStratix IIFulStratix‖GXPreliminaryStratix GXOther device familiesNo supportC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide1-2Chapter 1: About this MegaCore FunctionIntroductionIntroductionThe Hyper Transport Mega Core function implements high-speed packet transfersbetween physical(PhY) and link-layer devices, and is fully compliant with theHyperTransport l/O Link Specification, Revision 1.03. This Mega Core function allowsdesigners to interface to a wide range of Hyper TransportTm technology(hT)enableddevices quickly and easily, including network processors, coprocessors, videochipsets, and ASICsFeaturesThe Hyper Transport Mega Core function has the following features8-bit fully integrated hT end-chain interfacePacket-based protocolDual unidirectional point-to-point linksUp to 16 Gigabits per second(Gbps)throughput(8 Gbps in each direction)200, 300, and 400 MHz DDR links in Stratix and Stratix GX devices200, 300, 400, and 500 MHz ddr links in Stratix II and Stratix II GX devicesLow-swing differential signaling with 100-Q2 differential impedanceHardware verified with Hyper fransport interfaces on multiple industry standardprocessor and bridge devicesFully parameterized mega core function allows flexible, easy configurationFully optimized for the altera stratix Il, Stratix, Stratix GX, and Stratix II GXevice famillesApplication-side interface uses the Altera AtlanticTM interface standardManages Hr flow control, optimizing performance and ease of useIndependent buffering for each HT virtual channelAutomatic handling of ht ordering rulesStalling of one virtual channel does not delay other virtual channels(subject toorderingFlexible parameterized buffer sizes, allowing customization depending onsystem requirementsUser interface has independent interfaces for the HT virtual channels, allowingindependent user logic designCyclic redundancy code(crc) generation and checking to preserve data integrityIntegrated detection and response to common HT error conditions■ CRC errorsEnd-chain errorsFully integrated HT configuration space includes all required configuration spaceregisters and HT capabilities list registersHyper Transport MegaCore Function User Guideo March 2009 Altera CorporationChapter 1: About this MegaCore FunctionPerformance32-bit and 64-bit support across all base address registers bars)automatically handles all csr space accessesVerilog HDL and VHdL simulation supportOpen Core Plus EvaluationWith the Altera free Open Core Plus evaluation feature, you can perform the followingSimulate the behavior of a mcgafunction(Altera MegaCore function or AMPPmegafunction) within your systema Verify the functionality of your design, as well as quickly and easily evaluate itssize and speedGenerate time-limited device programming files for designs that includeMegaCore functionsProgram a device and verify your design in hardwareYou only need to purchase a license for the Mega Core function when you arecompletely satisfied with its functionality and performance and want to take yourdesign to productiono For more information about Open Core Plus hardware evaluation using theHyperTransport MegaCore function, refer to"Open Core Plus Time-Out Behavior"onpage 3-40 and AN 320: Open Core Plus Evaluation of megafunctionsPerformanceThe Hyper Transport Mega Core function uses 20 differential I/O pin pairs and 2single-ended I/O pins, requiring 42 pins total. Table 1-3 through Table 1-5 showtypical performance and adaptive look-up table (alut) or logic element (LE)usagefor the HyperTransport MegaCore function in Stratix II GX, Stratix IL, Stratix, andStratix GX devices respectively, using the Quartus@ II software version 7.1Table 1-3 shows the maximum supported data rates in megabits per second(Mbps)by device family and speed gradeTable 1-3. Maximum Supported Hyper Transport Data Rates (Note 1)Speed GradeDevice Family-36Stratix ll GX devices 1000 Mbps 1000 Mbps 800 MbpsNA(2)N/A(2NA(2)Stratix devices1000 Mbps 1000 Mbps 800 Mbps N/A(2)NA(2)NA(2)Stratix devicesN/A(2N/A(2)00 Mbps 800 Mbps 600 Mbps400 MbpsFlip-Chip packagesStratix devicesNA(2)NA(2)NA(2)600 Mbps400 Mbps400 Mbps(Wire Bond packagesStratix GX devicesN/A(2) N/A(2)800 Mbps 800 Mbps 600 Mbps N/A(2)Notes to table 1-3(1)Rates are per interface bit. Multiply by eight to calculate the uni-directional data rate of an 8-bit inter face(2) Devices ot this speed grade are not ottered in this device familyC March 2009 Altera CorporationHyperTransport Mega Core Function User GuideChapter 1: About this MegaCore FunctionPerformanceTable 1-4 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix II and Stratix II GX devicesTable 1-4. Hyper Transport Mega Core Function Performance in Stratix ll and Stratix ll GX DevicesParametersMemoryUserRXCombinationalHT Link InterfacePosted Non-Posted Response ClockingALUTSLogicfMAX(MHz) MAx(MHz)Buffers BuffersBuffers Option(12)Registers M4K M512 ( 3)3)Shared3.5005200120500125(4RX/TX/Ref35005200500Ref/x8Shared36005400160500>150RX/TXShared4.0006,00016150RX/TX16Shared4,1006,200500125(4)RX/TX/RefShared4.1006200500125(4Ref/TxShared4.2006400160150RX/TXNotes to table 1-4.Refer to " Clocking Options "on page 3-7 for more information about these options(2 )Other parameters(BAR configurations, etc. )vary the alut and Logic Register utilization numbers by approximately +/-200(3)Figures for -3 speed grade devices only(4) When using the Shared Rx/Tx/Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the ht frequency divided byTable 1-5 shows performance and device utilization for the Hyper TransportMegaCore function in Stratix and Stratix GX devicesTable 1-5. Hyper Transport Mega Core Function Performance in Stratix and Stratix GX DevicesUser Interface fmaxParametersUtilizationHT Link fMAX MHz)MHZ)RXRXSpeed GradePosted Non-Posted Response Clocking Option LEsM4KBuffers BuffersBuffers)(2 Blocks.5-66Shared rx/tx/ref1240010073)100734448888Shared Ref/Tx 7, 60014400400100{3)100(3)Shared rxtx7,90016400400>125>100Shared rxtx8.900125>100168Shared Rx/T×Ref9,400124004001003)100316Shared ref/ ix9.500144001003)10073)16Shared rx/x9.700400125Notes to table 1-5:(1)Refer to Clocking Options"on page 3-7 for more information about these options(2 )Other parameters( BAR configurations etc. )vary the LE utilization by approximately +/-200 LES(3 )When using the Shared Rx/Tx/ Ref and Shared Ref/Tx options, the user interface frequency is limited to exactly the hT frequency divided by fourHyper Transport MegaCore Function User GuideC March 2009 Altera CorporationA吉RA2. Getting StartedDesign FlowTo evaluate the HyperTransport Mega Core function using the Open Core Plus feature,include these steps in your design flowObtain and install the HyperTransport Mega Core functionThe HyperTransport Mega Core function is part of the MegaCore IP Library, which isdistributed with the Quartus ii software and downloadable from the altera websitewww.altera.como For system requirements and installation instructions, refer to Quartus II InstallationLicensing for Windows and Linux Workstations on the Altera website atwww.altera.com/literature/lit-qts.ispFigure 2-1 shows the directory structure after you install the HyperTransportMegaCore function, where is the installation directory. The default installationWindows is C: altera ; on Linux it islopt/alteraFigure 2-1. Directory StructureInstallation directorypContains the Altera MegaCore IP Library and third-party IP coresalteraContains the Altera MegaCore IP LibrarycommonContains shared componentshtContains the Hyper Transport Hyper Transport Megacore function files and documentationdocContains the documentation for the Hyper Transport MegaCore functionlibContains encrypted lower-level design filesexampleContains the design example for the Hyper Transport Mega Core function2. Create a custom variation of the Hyper Transport Mega Core function3. Implement the rest of your design using the design entry method of your choice4. Use the IP functional simulation model to verify the operation of your designo For more information about Ip functional simulation models, refer to the SimulatingAltera IP in Third-Party Simulation Tools chapter in volume 3 of the Quartus II Handbook5. Use the Quartus II software to compile your designC March 2009 Altera CorporationHyperT ransport Mega Core Function User Guide2-2Chapter 2: Getting StartedMega Core Function WalkthroughIg You can also generate an Open Core Plus time-limited programming file,which you can use to verify the operation of your design in hardware6. Purchase a license for the hypertransport Mega Core functionAfter you have purchased a license for the Hyper transport mega Core functionfollow these additional steps1. Set up licensing2. Generate a programming file for the Altera device(s)on your board3. Program the Altera device(s)with the completed designMegaCore Function WalkthroughThis walkthrough explains how to create a custom variation using the AlteraHyper Transport IP Toolbench and the Quartus II software, and simulate the functionusing an ip functional simulation model and the modelsim software when you arefinished generating your custom variation of the function, you can incorporate it intoⅴ our overall projectIe IP Toolbench allows you to select only legal combinations of parameters, and warnsou of any invalid configurationsIn this walkthrough you follow these stepsCreate a New Quartus II Projecta Launch the MegaWizard Plug-in Manager■Step1: Parameterizea Step 2: Set Up Simulation■Step3: Generate■ Simulate the designTo generate a wrapper file and Ip functional simulation model using default values,omit the procedure described in"Step 1: Parameterizeon page 2-5Create a New Quartus ll ProjectCreate a new Quartus II project with the New Project Wizard, which specifies theworking directory for the project, assigns the project name, and designates the nameof the top-level design entityTo create a new project, perform the following steps1. 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