-
UltraEdit_17+UltraCompare+注册机
UltraEdit_17.10.0.1010+UltraCompare v8.10.0.1014UE为免注册版，UC为注册版，有注册机（可用于UE及UC，生成注册码时，需要选择好）UE不用注册，UC注册时断开网络，选择脱机激活，注册用户和密码，随便填（必须包含字母）。原来会有两个用户码生成，打开注册机，在products选择为ultraCompare v8.x 把这两个用户码写在注册机上，然后生成，填入即可完成注册。
- 2021-05-07下载
- 积分：1
-
小波阈值去噪的程序，希望对小波初学者较大帮助。
小波阈值去噪的程序，包括默认阈值去噪、全局阈值去噪、自适应阈值去噪。
- 2021-05-06下载
- 积分：1
-
verilog_IEEE官方标准手册-2005_IEEE_P1364
The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group
- 2020-12-11下载
- 积分：1
-
未来教育考试系统(免激活)
计算机二级 未来教育考试系统 有题库资源 免激活 想考二级可以看一下
- 2021-05-06下载
- 积分：1
-
小波分析在心电信号去噪中的应用
心电信号的噪声特点小波分析与传统信号处理方法的比较小波去噪的基本原理小波去噪的基本步骤小波去噪中的阈值函数和阈值的选取小波去噪中小波函数的选择去噪效果的评价程序说明总结
- 2020-12-11下载
- 积分：1
-
ArcGIS地图边框样式
支持arcgis的边框样式，可以协助制作更加精美的地图，如需展示的专题图，提供多种花边图框样式
- 2020-11-28下载
- 积分：1
-
学生信息管理系统vb
（vb）学生信息管理系统 学籍管理系统 带有sql server数据库
- 2020-12-10下载
- 积分：1
-
LED点阵 4位16*16LED点阵广告牌 Proteus单片机仿真
这个4位16*16LED点阵广告牌是专们来提供给我们科技实训协会招新生，公告，学习单片机用的，里面有完整的程序，并且有Proteus单片机仿真，方便你的调试学习
- 2020-12-02下载
- 积分：1
-
凸透镜轴上成像的相差(matlab模拟)
凸透镜轴上成像的相差(matlab模拟)使用：在matlab命令行下输入lens_imaging后回车参数：根据提示输入，单位厘米例如：s1(物距)=30 n(折射率)=1.46 r1(左球面半径)=10 r2(右球面半径)=-10 R(透镜半径)=5 m(光线条数)=8
- 2020-12-02下载
- 积分：1
-
最小生成树的MATLAB程序
用MATLAB编写的最小生成树的程序.MATLAB编写的程序比其它的更简短,易读
- 2020-12-06下载
- 积分：1
