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realization of the project document ARM system CPLD logic, external resources ha...
该工程文件实现ARM系统中CPLD的逻辑工作,起到外围资源的逻辑地址译码功能-realization of the project document ARM system CPLD logic, external resources have address decoding logic function
- 2022-02-05 23:05:52下载
- 积分:1
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VGA
说明: 用VERILOG编写的一个可以实现VGA显示的程序.....(Prepared using a VERILOG VGA display program can .....)
- 2011-03-04 12:25:21下载
- 积分:1
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VHDL_Tips
VHDL Coding style guide
- 2012-07-04 18:05:59下载
- 积分:1
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dossvga
dos下的svga图形库,包括读bmp位图,打点划线等(svga graphics library under dos)
- 2015-10-18 22:30:38下载
- 积分:1
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AD
说明: 基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)
- 2019-07-30 14:00:57下载
- 积分:1
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VHDL出租车计价器,包含所有代码及其仿真结果
VHDL出租车计价器,包含所有代码及其仿真结果-VHDL Taximeter that contains all the code and the simulation results
- 2022-01-22 03:30:46下载
- 积分:1
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fpga_2014_flappy_bird
用VHDL语言写了个FLAPPY_BIRD的程序,利用板子与屏幕可以运行游戏(VHDL language to write a program FLAPPY_BIRD by the board and the screen can run the game)
- 2020-11-06 09:59:49下载
- 积分:1
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8b10b
8b10b编解码,用于光通信和千兆以太网,verilog编写,已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分:1
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3
说明: 利用vhdl语言编写的译码器程序,采用两种不同方式(The use of language decoder vhdl program, using two different ways)
- 2009-11-17 13:14:45下载
- 积分:1
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clo
实现时分秒的计数和校正实现时分秒的计数和校正(Realized and correction of minutes and seconds count)
- 2009-12-21 22:52:39下载
- 积分:1