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pc104vhdl_change
PC104总线的CPLD代码,调试已经通过,可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering
示例用法:)
- 2013-08-29 12:07:43下载
- 积分:1
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LowPassFilter
说明: 内部含3个模块,使用DDS产生200k与500k的正弦波,两者相加后过数字低通滤波(通带0-200k,阻带400k以上),并将波形输出,实测FFT分析中看不到500k分量。其中数字滤波器采用MATLAB设计(FIR+等波纹,阻带衰减-80dB)(There are three modules in the system. DDS is used to generate 200K and 500K sine waves. After adding the two modules, the digital low-pass filter (passband 0-200k, stopband above 400k) is used, and the waveform is output. 500K component can not be seen in the actual FFT analysis. The digital filter is designed by MATLAB (FIR + equal ripple, stopband attenuation - 80dB))
- 2020-09-09 14:21:01下载
- 积分:1
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ad73311
AD73311芯片的控制和数据程序,用于控制音频AD芯片。(AD73311 chip control and data program)
- 2021-02-01 23:20:00下载
- 积分:1
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UART
Task4 for learning verilog
- 2019-05-28 12:31:15下载
- 积分:1
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xspUSB
说明: 关于usb调试相关测试 代码,用于测试和适配等(usb coding for testing , verigy, for studing usb and fpga)
- 2020-06-22 23:00:01下载
- 积分:1
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SCRAMBLER
32位扰码器的verilog代码,编译通过(The Verilog code of 32_bit scrambler)
- 2009-11-24 14:51:38下载
- 积分:1
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uc1701x_SPI
UC1701串行编程例子,是一个很好的控制LCD模块的C语言串行编程(UC1701 serial program)
- 2013-05-31 19:22:19下载
- 积分:1
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ADC实验
用于单片机的adc采集实验,经过降噪处理,结果精确(ADC acquisition experiment for single chip computer, after noise reduction processing, the result is accurate)
- 2018-11-27 21:41:13下载
- 积分:1
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io_uart
verilog设计的32位IO口扫描后通过串口发送到计算机(Verilog design of 32 bit IO export after scanning through the serial port to the computer)
- 2012-12-27 00:05:01下载
- 积分:1
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car
基于Xilinx公司的ISE软件开发的智能循迹避障小车的源代码,用Verilog语言,传感器有红外传感器以及超声波传感器(Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors)
- 2015-03-21 18:06:18下载
- 积分:1