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夏宇闻-Verilog数字逻辑设计教程
说明： 引入了Verilog HDL硬件描述语言介绍了信号处理与硬线逻辑设计的关系，以及有关的基本概念。(In this paper, Verilog HDL hardware description language is introduced to introduce the relationship between signal processing and hardware logic design, as well as the related basic concepts.)
- 2019-10-28 13:11:12下载
- 积分：1
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速率发生器
这个程序是用来划分时钟，实现9600个传输速率的。该代码是在10兆赫的时钟频率运行。它计算特定的传输速率所需的比特数；
- 2022-08-22 03:09:34下载
- 积分：1
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ytupn
Very suitable for the study using computer vision, Analysis of the signal time domain, frequency domain, cepstrum, cyclic spectrum, etc. The performance of the program has reached a high level.
- 2017-09-02 18:07:13下载
- 积分：1
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基于Verilog的IIC协议的实现
用Verilog代码来实现iic协议，主要是通过两个按键来控制读写命令，读取的数据最后用数码管显示出来，代码里面有很详细的注释和说明。
- 2022-04-25 01:39:18下载
- 积分：1
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Project_Gbit
pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)
- 2020-06-17 20:40:04下载
- 积分：1
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matlab-gmsk
基于matlab和vhdl的通信原理gmsk调制算法，主要包括GMSK相位路径的计算,GMSK眼图的仿真以验证相位计算的正确性,正余弦表的量化及bin文件的生成,以及用VHDL硬件语言所描述的基于EPM7128的地址逻辑.(Matlab and vhdl based on the principle gmsk Modulation of communication, including GMSK phase path calculation, GMSK eye diagrams of the simulation to verify the correctness of the phase calculation, is the cosine table generating quantitative and bin files, and using VHDL hardware description language logic based on the address of EPM7128.)
- 2020-12-19 10:39:10下载
- 积分：1
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ControlUnit
Control Unit VHDL code. Xilinx Spartan 3E board
- 2012-03-15 13:29:40下载
- 积分：1
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qam_64
Verilog语言下QAM调制的DDS实现(The QAM Modulation DDS achieve)
- 2021-02-20 11:59:43下载
- 积分：1
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seven-voting
用verilog 语言实现七人投票表决器(verilog seven voting)
- 2020-09-24 10:57:48下载
- 积分：1
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asynchronous-fifo
同步fifo的调用程序，调用Quartus II 9.0 (32-Bit)中的fifo模块(Synchronous fifo calling program, call Quartus II 9.0 (32-Bit) in fifo module)
- 2013-08-23 21:58:56下载
- 积分：1
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