-
ise
xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能(Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance existing projects the system clock frequency, at the same time you can also use static timing report after mapping, as well as after placement and routing static timing analysis report to you design performance)
- 2007-09-20 14:30:52下载
- 积分：1
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Collected their own routines VHDL code, suitable for beginners to learn, I hope...
自己收集的VHDL例程代码，适合初学者学习用，希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.
- 2022-07-02 04:49:52下载
- 积分：1
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Am29LV160D
Am29LV160D数据基本知识手册，基本原理及工作方式。(Am29LV160D Data basic knowledge Manual, the basic principle and ways of working.)
- 2013-06-05 19:26:08下载
- 积分：1
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Generate_4fsk
雷达信号产生4PSK简单脉冲信号很好用信号产生(Radar signal pulse signal generating 4PSK simple signal generating good)
- 2013-06-22 23:10:05下载
- 积分：1
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基于无源蜂鸣器和矩阵按键的电子琴系统设计
基于无源蜂鸣器和矩阵按键的电子琴系统设计(design of Electronic Piano System Based on Passive Buzzer and Matrix Key)
- 2020-06-21 01:20:08下载
- 积分：1
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ad9288
使用FPGA控制AD9288，方便移植，可以拿来直接使用，适合新手学习(Use FPGA control AD9288, easy migration, can be used to directly use for novices to learn)
- 2021-04-21 08:58:49下载
- 积分：1
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7-segment
一个7段的显示器，及按一定顺序循环得到的结果，可重复使用(A 7-segment display, and by a certain sequence and cycle the results obtained can be reused)
- 2010-01-10 18:21:33下载
- 积分：1
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PS2
基于FPGA的键盘PS第二类编码方式的verilog解码程序。基于FPGA的键盘PS第二类编码方式的verilog解码程序。(FPGA keyboard PS encoding the verilog decoding procedures. FPGA keyboard PS encoding the verilog decoding procedures.)
- 2013-04-13 20:02:06下载
- 积分：1
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RScoder
基于FPGA的RS编码器设计，verilog hdl语言。(RS encoder FPGA-based design, verilog hdl language.)
- 2011-07-17 22:18:08下载
- 积分：1
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13.3_Tracing
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动跟踪(System Generator based image processing engineering, multimedia processing on FPGA source, video-based motion tracking)
- 2020-11-04 17:39:51下载
- 积分：1
