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DDR-SDRAM-Controller
DDR SDRAM控制器verilog代码及中文说明文档(DDR SDRAM Controller Using Virtex-5 FPGA Devices)
- 2016-01-20 13:58:46下载
- 积分：1
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ethernet_tri_mode_rtl.tar
以太网控制器verilog，含有mac,mii接口(Ethernet controller verilog, containing mac, mii interface)
- 2007-12-19 23:51:08下载
- 积分：1
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callback
说明： This is code of UVM CALLBACK function.
- 2020-06-24 15:40:02下载
- 积分：1
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DDS
DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)
- 2007-12-11 16:26:33下载
- 积分：1
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JSFP
奇数分频-此程序对输入频率sysclk有奇数（X）分频的功能(Odd frequency- this program has an odd number of input frequency sysclk (X) frequency function)
- 2011-08-01 12:37:42下载
- 积分：1
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uart
it contains pdf file which has vhdl program of uart (universal asynchoronus receiver and transmitter). which very simple and easy to understand
- 2010-04-22 20:47:55下载
- 积分：1
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based-on-fpga
基于fpga的电子血压计。pdf文档，好用，内容清楚简单，转载而来(Electronic sphygmomanometer based on fpga)
- 2013-12-05 10:57:22下载
- 积分：1
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fpga-jpeg
包含DCT变换，RGB2YCBCR,JPEG等多个verilog代码及工程(Contains DCT transform, RGB2YCBCR, JPEG and many other verilog code and project)
- 2013-07-02 14:10:16下载
- 积分：1
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16bit multiplier
Verilog code to implment the 16 bits logic multiplier. The output is also 16bits including the document to describe the implement in detail .
- 2022-01-28 09:21:47下载
- 积分：1
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pj_gtx
说明： 利用高速口GTX进行快速的数据传输，包括接受和发送模块，用途广泛(The use of high-speed port GTX for fast data transmission, including receiving and sending modules, has a wide range of uses.)
- 2019-03-25 21:40:10下载
- 积分：1
