登录
首页 » VHDL » DE2

DE2

于 2022-02-01 发布 文件大小:972.40 kB
0 117
下载积分: 2 下载次数: 1

代码说明:

DE2-70,NIOS reference file,

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Waveform-generation-program
    基于VHDL语言的波形发生器编程设计,能够实现常用波形的产生。(Waveform generator design based on VHDL programming, to achieve common waveform generated.)
    2014-05-05 16:50:23下载
    积分:1
  • DE2_115_NIOS_DEVICE_LED
    DE2-115开发板LED显示测试源码,对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)
    2011-09-29 15:07:10下载
    积分:1
  • 用VHDL写的
    用vhdl写的-using VHDL write
    2022-03-16 07:17:41下载
    积分:1
  • FPGA
    Verilog 我认为写的非常好的细节书(Verilog In my opinion written details of the book)
    2012-10-03 10:10:46下载
    积分:1
  • Verilog Blocking and Non Blocking
    Verilog Blocking and Non Blocking
    2022-01-27 18:34:43下载
    积分:1
  • 7_to_1-LVDS-dispaly-from-FLASH
    该代码是基于verilog 实现的代码,可以用于对接受1080P的LVDS视频数据并处理后显示到各种规格的LCD屏幕上,且支持从FLASH中读取BMP的图片数据并实时显示到LCS屏幕(The code is based on the code verilog achieve, it can be used for receiving LVDS 1080P video and data processing displayed on a variety of LCD screen, and support for reading data the FLASH BMP images and real-time display to the LCS screen)
    2016-02-18 14:06:22下载
    积分:1
  • FPGA-IMPLEMENTATIONS-OF-THE-DES
    FPGA based design and Implementation of Advanced Encryption Standard
    2015-07-20 23:33:11下载
    积分:1
  • 这时一个数字钟的VHDL程序,有计时、校时、整点报时功能,很适合做EDA设计之用...
    这时一个数字钟的VHDL程序,有计时、校时、整点报时功能,很适合做EDA设计之用-When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design
    2022-05-22 23:36:04下载
    积分:1
  • RS_255_223_ENCODER
    RS(255,223)编码器程序 从一本书上看到的,很不错的(RS(255,223) encode , very good good good )
    2021-05-13 00:30:02下载
    积分:1
  • PCI_arbi
    PCI arbi verilog source code
    2009-03-29 18:04:41下载
    积分:1
  • 696518资源总数
  • 105895会员总数
  • 18今日下载