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FIFO2
用verilog HDL语言编写的fifo存储器源文件 (Using Verilog language HDL FIFO memory source file)
- 2012-03-08 09:12:18下载
- 积分：1
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11-07-11
AD9910实现脉冲内线性调频信号，仅供参考(AD9910 to achieve linear FM pulse signal, for reference only)
- 2013-09-16 10:52:00下载
- 积分：1
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chuankou
本实验为UART回环实例，实验程序分为顶层unrt_top、发送模块uart_tx、接收模块 uart_rx，以及时钟产生模块clk＿div。uart＿rx将收到的包解析出8位的数据，再传送给 uart_tx发出，形成回环。参考时钟频率为100MHz，波特率设定为9600bps。(This experiment is an example of UART loop. The experimental program is divided into top-level unrt_top, sending module uart_tx, receiving module uart_rx, and clock generation module clk_div. Uart_rx parses the received packet into 8 bits of data and sends it to uart_tx to send out, forming a loop. The reference clock frequency is 100 MHz and the baud rate is set to 9600 bps. stay)
- 2020-06-24 01:40:02下载
- 积分：1
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在FPGA上实现的定码长3/4码率LDPC码编译码器
本编译码器，为码长在信息位为288码长，码率为3/4的短码LDPC编译码器，目前为最出版串行编译码，资源占比小，模块化，可扩展为半并行，缩短延时，LDPC矩阵可根据需要定制变更，测试平台文件在文件夹中的simulation中。
- 2022-12-12 16:30:07下载
- 积分：1
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formal_verification
说明： 现在最流行的RTL设计方法之一，本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)
- 2020-06-23 22:00:02下载
- 积分：1
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LEDbrightness
使用PWM控制LED亮度的单片机C代码，共计十个亮度。(PWM control of LED brightness microcontroller C code, for a total of ten brightness.)
- 2012-06-08 21:14:10下载
- 积分：1
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Quartus_II部分实例
说明： 38译码器，D触发器，全加器，计数器，抢答器，优先编码器，111序列检测器，并行输入转串行输出(poor English.
38 decoder, D trigger, full adder, counter, scrambler, priority encoder, 111 sequence detector, parallel input to serial output)
- 2020-05-18 12:06:54下载
- 积分：1
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Processor Design
verylog中的处理器设计代码。
- 2022-08-19 22:15:09下载
- 积分：1
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Chip_hardware_description_language_related_program
硬件描述语言相关芯片程序源码Chip hardware description language-related program source code(Chip hardware description language-related program source Chip hardware description language-related program source code)
- 2010-07-28 07:53:40下载
- 积分：1
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verilog-lfsr-master
说明： Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.
- 2020-06-24 21:40:01下载
- 积分：1
