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VHDL语言100例详解
说明： VHDL语言100例详解。详细讲解了用VHDL语言进行数字电路和数字系统设计的知识。用100个实例，不仅进行基础的门电路设计，而且还有较为复杂的数字系统设计。这些实例可以直接被调用。(VHDL Elaborates on 100 cases. Detailed account of VHDL for digital circuits and digital systems design knowledge. With 100 examples, not only for infrastructure gate design, but also more complex digital system design. These examples can be called.)
- 2005-09-04 17:15:21下载
- 积分：1
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fir_vivado
此压缩包里面有基于vivado平台的工程，包括了正弦信号的产生，还有fir滤波器的设计以及fft算法的设计实现(in this package,there are three projects of
the generation of the signal of sin and the
design of fir filter and the ari)
- 2016-09-18 15:00:22下载
- 积分：1
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6264
6264是一种8K×8的静态存储器.SRAM 的典型芯片有2KB 的6116、8KB 的6264 以及32KB的62256,其中6264 芯片应用最为广泛.(6264 is the 62256 typical chip SRAM.SRAM a 8K* 8 with 2KB 6116, 8KB 6264 and 32KB 6264 chip, which is most widely used.
)
- 2015-02-01 13:28:11下载
- 积分：1
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BGM benchmark
// DEFINES
`define BITS 32 // Bit width of the operands
`define NumPath 34
module bgm(clock,
reset,
sigma_a,
sigma_b,
sigma_c,
Fn,
dw_x,
dw_y,
dw_z,
dt,
Fn_out
);
// SIGNAL DECLARATIONS
input clock;
input reset;
input [`BITS-1:0] sigma_a;
input [`BITS-1:0] sigma_b;
input [`BITS-1:0] sigma_c;
input [`BITS-1:0] Fn;
input [`BITS-1:0] dw_x;
input [`BITS-1:0] dw_y;
input [`BITS-1:0] dw_z;
input [`BITS-1:0] dt;
- 2022-04-09 23:29:23下载
- 积分：1
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sdram
数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分：1
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shuzishizhong
数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)
- 2011-12-20 19:53:07下载
- 积分：1
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温度补偿的bp神经网络实现
使用不怕神经网络做硬件加速，实现温度补偿
- 2023-08-13 09:50:03下载
- 积分：1
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adc_cfg
说明： adc器件ads62p49配置代码，已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)
- 2020-11-04 16:29:51下载
- 积分：1
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fft1024 verilog代码
fft1024 verilog 代码 可以编译成功 建议下载学习(The fft1024 verilog code can compile successful Suggestions for download learning)
- 2017-07-20 10:31:05下载
- 积分：1
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rtl_wangjiangxing
ecc椭圆算法RTL,verilog源代码经过验证，用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)
- 2015-01-29 18:43:47下载
- 积分：1
