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LCD_test
this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga
- 2013-07-25 14:43:43下载
- 积分:1
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对实例的Nios II开发的源代码,主要基于NIO…
本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。
本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
- 2022-07-16 15:35:51下载
- 积分:1
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24_Timer
说明: 使用Verilog编写的24位定时器,具有apb 总线接口,可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
- 2021-04-27 21:38:44下载
- 积分:1
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TLC7528
fpga驱动TLC7528程序,相当好用,绝对能用(FPGA PROGRAM OF TLC7528)
- 2011-08-17 15:19:03下载
- 积分:1
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OFDMSystemDesignandSimulation
OFDM通信系统设计与仿真(shuoshilunwen)(OFDM System Design and Simulation
)
- 2014-08-18 15:09:35下载
- 积分:1
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vhdl coding for Carry Select Adder
这是一个vhdl代码的进位选择加法器及其工作100%。
- 2023-08-26 17:05:04下载
- 积分:1
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DE2
基于DE2的视频电话部分源码,实现了视频图像采集,VGA显示,局域网通讯等功能-DE2-based video telephony part of the source code to achieve the video image capture, VGA display, LAN communications function
- 2022-04-18 21:55:17下载
- 积分:1
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traffic-light
Traffic light program in c presents what happens in our daily life at traffic light signals.
- 2012-11-06 06:50:15下载
- 积分:1
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jtag
verilog语言编写的jtag(边界扫描模块),初学的时候可以看看(verilog language jtag (boundary scan module), a novice when you can look)
- 2021-04-27 14:38:44下载
- 积分:1
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计数器的 vhdl 代码
我们使用此代码开发 plc 在 fpga 硬件计数器的程序
- 2023-02-08 13:05:03下载
- 积分:1