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pll_carrier_syn
本程序是锁相环的仿真程序,具有接收端载波同步的功能。注释详尽,程序规范。发端的调制方式有单载波调制,BPSK调制,QPSK调制可供选择。程序中有星座图,锁相环的频差、相差图,以及解调后的基带波形。(This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform.)
- 2013-04-11 09:18:49下载
- 积分:1
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数字信号处理的FPGA实现(第4版)源码
数字信号处理的FPGA实现(第4版)的配套源码,极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)
- 2021-01-16 23:08:50下载
- 积分:1
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Datasheets
关于ALTERA DE2板上的文档资料,包括应用实例,用户文档和板上常用器件的技术文档(datasheets of ALTERA DE2)
- 2010-03-10 10:14:08下载
- 积分:1
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Timing_Closure
详细讲解时序约束培训教材,有利于更好对时序约束的理解(Timing constraints elaborate training materials, facilitate better understanding of the timing constraints)
- 2010-08-12 20:02:33下载
- 积分:1
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4-16.doc
4-16译码器,用VHDL编写的,可以直接下载到可编程逻辑器件中(4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device)
- 2010-11-24 15:13:14下载
- 积分:1
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comp
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
- 2012-06-05 23:16:25下载
- 积分:1
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fpga vhdl
fpga测温的框图和源码 希望能帮到大家 没有测试 紧供参考-fpga vhdl
- 2022-07-20 06:55:34下载
- 积分:1
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AES_128
AES 128 bit with various device interface on FPGA
- 2021-03-09 17:59:27下载
- 积分:1
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这是“状态机设计(讲稿)”,希望对正在学VHDL的同学有帮助,谢谢!...
这是“状态机设计(讲稿)”,希望对正在学VHDL的同学有帮助,谢谢!-This is the "state machine design (the script)", and I hope to learn VHDL is there to help the students, thank you!
- 2022-11-16 16:25:03下载
- 积分:1
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如何在语言 VHDL 实现液晶显示中显示的数据转移
如何在语言 VHDL 实现液晶显示中显示的数据转移
- 2023-04-29 11:00:03下载
- 积分:1