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chuankou
本实验为UART回环实例，实验程序分为顶层unrt_top、发送模块uart_tx、接收模块 uart_rx，以及时钟产生模块clk＿div。uart＿rx将收到的包解析出8位的数据，再传送给 uart_tx发出，形成回环。参考时钟频率为100MHz，波特率设定为9600bps。(This experiment is an example of UART loop. The experimental program is divided into top-level unrt_top, sending module uart_tx, receiving module uart_rx, and clock generation module clk_div. Uart_rx parses the received packet into 8 bits of data and sends it to uart_tx to send out, forming a loop. The reference clock frequency is 100 MHz and the baud rate is set to 9600 bps. stay)
- 2020-06-24 01:40:02下载
- 积分：1
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phone
用DE0开发板实现电话计费器，基本功能：可设置通话模式，能初始化话费余额，拨动开关可进入通话模式，并根据通话时间和相应通话模式扣除相应的费用。通话过程中能够通过开关切换显示通话时间和话费余额，并可暂停通话。压缩包里有详细的WORD文档的说明，包括波形仿真和DE0的引脚功能介绍。(Implemented by DE0 board telephone billing, basic function: to set the call mode, you can initiate credit balance, toggle switch into the talk mode, and deduct the cost of a call based on call time and the corresponding mode. Call talk time and can be displayed by switching credit balance, and mute. Compression bag has a detailed description of WORD documents, including the waveform simulation and DE0 pin function description.)
- 2020-11-06 13:19:49下载
- 积分：1
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FPGA自学笔记——设计与验证jmb
说明： Verilog教程，小梅哥FPGA自学与验证(a basic book of how to learn Veriolg)
- 2019-01-23 17:34:25下载
- 积分：1
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IIC EEPROM verilog 代码
EEPROM HDC2010温湿度传感器的verilog读写代码，IIC通信，Verilog，测试通过
- 2023-02-28 20:45:03下载
- 积分：1
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cordic
说明： 16级流水线型cordic旋转代码以及测试文件，亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)
- 2019-03-09 08:59:01下载
- 积分：1
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fsk
基于FPGA的fsk调制程序，包括载波的生成，nco的设置(FPGA-based fsk modulation procedures, including carrier generation, nco settings)
- 2016-05-12 21:00:56下载
- 积分：1
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1.深入浅出玩转FPGA_吴厚航
说明： 学习FPGA的优秀资料，从基础知识到开发设计再到仿真，很不错的FPGA学习资料(Excellent Teaching Materials for Learning FPGA)
- 2019-05-11 14:48:07下载
- 积分：1
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tlc549
数字电压表的实现，VHDL语言实现，AD采用TLC549，通过学习，了解AD采集过程(The realization of digital voltage meter, VHDL language, AD using TLC549, by learning to understand the acquisition process AD)
- 2009-07-09 09:15:15下载
- 积分：1
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mipiTolvds
mipi转LVDS接口， verilog代码，在lattice 芯片上使用，已验证(MIPI to LVDS interface)
- 2018-07-06 20:19:54下载
- 积分：1
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TugasUAS_AuditTI_1504505017_Reguler
说明： ertyguhijop[lkjhvbn hiouopi][[poiuy
- 2019-02-05 09:18:23下载
- 积分：1
