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提供的i2c控制IP核 master
open cores 提供的i2c控制IP核 可直接在FPGA上使用。并带有相关的测试程序(endorsed by the i2c controller IP provided by the open cores on the FPGA. With the relevant test procedures)
- 2012-05-23 10:31:27下载
- 积分:1
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Get-20-point
this program get 20 point from user and draw functions.
- 2014-01-09 03:25:06下载
- 积分:1
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跨时钟域数据传输--经典结绳法
资源描述
说明: 结绳模块(Pluse2Toggle): 负责延长待采样信号
同步模块(Synchronization):负责双触发器锁存
解绳模块(Toggle2Pluse): 负责将长信号转换成脉冲信号
支持信号从快时钟域到慢时钟域,也支持信号从满时钟域到快时钟域,
- 2022-02-27 06:40:32下载
- 积分:1
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VendingMachine
VHDL Vendingmachine source
- 2013-11-02 06:19:46下载
- 积分:1
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pll
用FPGA实现数字锁相环,开发环境为ISE(Using FPGA digital phase-locked loop, development environment for ISE)
- 2021-03-19 18:29:19下载
- 积分:1
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generate-coordinates
使用VHDL编写语言,巧妙的利用计数器和循环输出一个坐标系,由于VHDL出现负数比较麻烦,全部由正数代替,输出一个原点在中心,半径128的256×256的坐标。方便坐标变换以及用此坐标做算法。(Use of VHDL language, clever use of counter and loop outputs a coordinate system, because VHDL negative too much trouble, all replaced by a positive number, the output an origin at the center, radius 128 256 256 coordinates. Convenient coordinate transformation and coordinate to do with this algorithm.)
- 2013-08-28 11:03:46下载
- 积分:1
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facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1
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verilog
一些简单的Verilog代码,小例程,比如求平均值、七段数码管等等(Some simple Verilog code, small routines, such as averaging, seven digital tubes and so on)
- 2016-12-12 10:02:20下载
- 积分:1
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用Verilog做的SD卡控制器(有详细的注释)
说明: SDIO 接口,实现SD卡的控制器功能,带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分:1
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juchibo
用vhdl语言生成锯齿波,数据可自行改变(Sawtooth wave with vhdl language generation, the data can change by itself)
- 2011-12-21 19:29:51下载
- 积分:1