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aFifo
verylog语言编程,为异步flipflop的程序。具有数据传输功能,数据位数可以用户设定(verylog language programming for asynchronous Flipflop procedures. With a data transmission function, data can be user set the median)
- 2007-08-28 10:26:03下载
- 积分:1
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fpga-fft
xlinx fpga实现fft功能,利用ip核,包含源程序及完整工程文件,直接就能使用(The fft function xlinx fpga ip-core contains the source code and complete the project file, and can be used directly)
- 2013-02-22 10:37:47下载
- 积分:1
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VHDL 编写的RAM例子
VHDL 编写的RAM例子-RAM prepared VHDL example
- 2023-03-23 05:20:03下载
- 积分:1
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src
Crossroad traffic lights with visualization in tcl/tk and verilog code
- 2010-07-22 03:43:55下载
- 积分:1
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速率发生器
应用背景通用模块,以产生可重构的源时钟频率的传输速率。该模块可用于UART,自定义串口协议等。提供一个时钟发生器模块产生可选 ;-波特利率和;——时钟源(可选择分因素) ;还产生接收 ;——时钟的16倍,8倍,倍,倍的传输波特率 ;关键技术UART,VHDL,FPGA,CPLD programmanle逻辑器件。设备无关的代码
- 2023-01-24 03:05:04下载
- 积分:1
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ISCAS`89基准电路下载(包括Verilog和VHDL格式)
SCAS `89 基准电路下载,包括Verilog和VHDL格式。verilog格式30个文件:包括S1238、S13207等;(SCAS `89 benchmark circuit downloads, including Verilog and VHDL formats. Verilog format 30 files: including S1238, S13207 and so on;)
- 2021-01-02 15:58:56下载
- 积分:1
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在 VHDL 乒乓 P 楚方法之后写的定时器模块
这是一个简单的定时器模块使用计数器
- 2022-03-06 05:59:32下载
- 积分:1
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8位数字显示的简易频率计
(1)能够测试10HZ~10MHZ的方波信号;
(2)电路输入的基准时钟为1HZ,要求测量值以8421BCD码形式输出;
(3)系统有复位键;
(4)采用分层次分模块的方法,用Verilog HDL进行设计,并对各个模块写出测试代码;
(5)具体参照说明文档(包含源代码,仿真图,测试波形,详细的设计说明)(A square wave signal capable of testing 10HZ~10MHZ;
(2) the reference clock input by the circuit is 1HZ, and the measured value is output in the form of 8421BCD code;
(3) the system has a reset key;
(4) adopt the method of layering sub sub module and design with Verilog HDL;
(5) write test simulation program.)
- 2020-12-02 02:59:26下载
- 积分:1
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这是一个FPGA sparttan 3E基础工程,
this a fpga sparttan 3e based project in which
i have made a game based on vga interface .
this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.-this is a fpga sparttan 3e based project in which
i have made a game based on vga interface .
this file is the supporting file for keyboard interface and it also included a intro.vhdl file required for the startup animation file.
- 2022-11-15 01:50:04下载
- 积分:1
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- 2022-12-14 10:50:03下载
- 积分:1