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用VHDL实现的DDS逻辑,大家可以参考下
用VHDL实现的DDS逻辑,大家可以参考下-DDS achieved using VHDL logic, we can refer to the following
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Altera USB声卡
altera usb 下载线DIY完全资料-altera usb blaster
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实现了简单的电子表功能,是24小时,用VHDL所编写的,quartus ii 7.2...
实现了简单的电子表功能,是24小时,用VHDL所编写的,quartus ii 7.2-To achieve a simple spreadsheet functions, is 24 hours, using VHDL prepared, quartus ii 7.2
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四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。...
四人抢答器,已通过编译,仿真,包括抢答识别、计分、计时、数字显示等功能。-Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
- 2023-08-16 08:05:03下载
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循环码的verilog编码程序
(7,4)循环码的verilog编码程序,(7,4)循环码的verilog译码程序((7,4) cyclic code Verilog coding procedures, (7,4) cyclic code the verilog decoding procedure)
- 2020-06-27 02:00:02下载
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generateCAcode
gps C/A码生成
生成gps32颗卫星伪码,方便,经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)
- 2021-05-13 04:30:02下载
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Altera官方FPGA电机控制的中文文档
Altera官方FPGA电机控制的中文文档,很不错的参考资料(Altera Official FPGA Motor Control Chinese Document, Good Reference)
- 2021-03-18 13:49:19下载
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fifoi
基于Xilinx Vertex2的可综合的2048x10位的读写可控制FIFO模块源代码,深度可控(Based on the Xilinx Vertex2 can be integrated 2048x10-bit read and write can control the FIFO module source code, the depth of controllable)
- 2008-12-19 00:17:51下载
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CH2CH1VHDL 数字电路参考书所有程序4
CH2CH1VHDL 数字电路参考书所有程序4-CH2CH1VHDL digital circuit reference all proceedings 4
- 2022-07-15 17:40:45下载
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RobustVerilog_free1.2_win
RobustVerilog生成verilog工具(RobustVerilog version)
- 2021-01-22 18:18:41下载
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