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CodedLOCK
基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分:1
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uvm_use_pipelined_ahb
一个简单的uvm搭建的ahb简单实例,包含了各个组件以及编译的运行的脚本(one sample example about ahb,include every component and compile script)
- 2020-10-21 12:17:24下载
- 积分:1
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rscode
RS编码器在fpga上的实现,用的modelsim开发环境(RS encoder in the realization of the fpga, development environment used in modelsim)
- 2009-06-11 21:45:49下载
- 积分:1
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xapp1248
说明: Implementing SMPTE SDI Interfaces with UltraScale GTH Transceivers
- 2019-12-06 17:24:49下载
- 积分:1
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xapp1161
多相滤波系统的设计与实现,有MATLAB仿真程序,有sysgen的系统仿真,还有VHDL代码,其中还有FIR的系数参数等等(Polyphase filter system, the design and implementation includes a MATLAB simulation program, sysgen system simulation, and VHDL code, including FIR coefficient parameters, and so on
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- 2021-02-15 17:29:47下载
- 积分:1
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firhalfband
利用matlab提供的firhalfban函数设计阶数为16、通阻带容限为0.0001的半带滤波器。仿真测试滤波前后的信号时域图,回执滤波器的频率响应特性图(Provided firhalfban function using matlab design order of 16, through the 0.0001 stopband wool half-band filter. Simulation test filtered time domain signal before and after, receipt filter frequency response characteristic diagram)
- 2020-07-03 21:40:02下载
- 积分:1
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vhdl
说明: 这个事VHDL基础知识,内面主要内容是编码器的插V过程,值得下载学习!(it is really useful for those who never touch it!)
- 2010-04-16 13:57:35下载
- 积分:1
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bt656_to_yuv422
从bt656数据流中提取出同步信号, 适合于搞fpga/cpld开发调式(bt656 internel sync to extern sync singal,
bt656 internel sync to extern sync singal)
- 2021-03-06 11:19:30下载
- 积分:1
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quartusII的使用说明书,特别适用于初学者使用。
quartusII的使用说明书,特别适用于初学者使用。-quartusII the use of brochures, especially for beginners to use.
- 2022-03-21 18:58:23下载
- 积分:1
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s5pv-u-boot-LCD-display
s5pv-u-boot-2011.06之增加LCD显示功能(s5pv-u-boot-2011.06 Increase LCD display function)
- 2013-03-14 09:45:18下载
- 积分:1