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Using VHDL hardware language to achieve the top level of the IIC control procedu...
用VHDL硬件语言实现的iic顶层控制程序-Using VHDL hardware language to achieve the top level of the IIC control procedures
- 2022-12-20 20:00:08下载
- 积分：1
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基于fpga的fskpsk信号产生器，可实现对1.2kHz和2.4kHz正弦波的采样...
基于fpga的fskpsk信号产生器，可实现对1.2kHz和2.4kHz正弦波的采样-based on the fpga and fskpsk signal generator,can achieve sample to the 1.2kHz and 2.4kHz sin wave
- 2023-08-25 08:15:03下载
- 积分：1
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altera公司cycloneII全系列说明书，实用
altera公司cycloneII全系列说明书，实用-altera" s cycloneII a full range of manual, practical
- 2022-02-04 11:53:16下载
- 积分：1
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vga显示代码,里面有ise工程文件,是直接调过去的,大家下载下来吧...
vga显示代码,里面有ise工程文件,是直接调过去的,大家下载下来吧-vga display code, which has ise project file is transferred directly past, everyone download it
- 2022-11-14 00:10:04下载
- 积分：1
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很好的quartus软件仿真教程，flash版。
很好的quartus软件仿真教程，flash版。-Good quartus software simulation tutorials, flash version.
- 2023-03-08 19:40:06下载
- 积分：1
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add16
designing of 16 bit adder using 4 bit adder using verilog code
- 2012-09-10 14:40:32下载
- 积分：1
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verilog-lfsr-master
Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.
- 2020-06-24 21:40:01下载
- 积分：1
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sig_detect
使用信号功率计算，检测信号是否到达。从而控制后续模块，以减小系统功耗。(Signal power calculation, the detection signal to reach. To control follow-up modules to reduce system power consumption.)
- 2012-08-08 15:30:13下载
- 积分：1
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Using VHDL programming asynchronous FIFO procedure can be run by the debugger
使用VHDL编程的异步FIFO程序 经调试可运行-Using VHDL programming asynchronous FIFO procedure can be run by the debugger
- 2022-03-23 14:37:37下载
- 积分：1
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WCDMA_DPD
WCDMA数字直放站中数字预失真研究及其FPGA实现(WCDMA Digital Repeater digital pre-distortion and its FPGA implementation)
- 2011-10-16 19:24:50下载
- 积分：1
