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coubter_key
ISE环境下Verilog编程实现机械按键去抖(ISE Verilog programming environment under mechanical debounces)
- 2015-12-13 12:52:42下载
- 积分:1
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This application note explains the process of eveloping and debugging a hardware...
This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.-This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.
- 2022-01-23 11:16:04下载
- 积分:1
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nerualnetwork
本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。
(In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.)
- 2008-12-14 01:37:03下载
- 积分:1
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总结设计中的重点及注意的地方,常出现错误的地方等。
总结设计中的重点及注意的地方,常出现错误的地方等。-Summarize the design of the focus and attention of local, often the wrong place and so on.
- 2022-08-24 04:12:36下载
- 积分:1
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mod 6 计数器
在几乎所有的数字系统,计数器被广泛使用的领域,如频率
- 2022-06-14 15:14:34下载
- 积分:1
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VGA_Display(FPGA)
在FPGA开发平台上,通过按键控制一个弹球小游戏。输出VGA显示信号输送到显示器上显示(On the FPGA development platform button control of a pinball game. VGA output signal is supplied to the display displayed on the display)
- 2017-05-02 10:59:42下载
- 积分:1
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fir-filter
11阶fir数字滤波器的verilog程序设计,线性相位,系数量化处理(11 order of fir digital filter verilog programming, linear phase, the coefficient quantization)
- 2012-03-05 10:33:03下载
- 积分:1
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电子闹钟:基于fpga的电子闹钟设计,采用模块化方式
电子闹钟:基于fpga的电子闹钟设计,采用模块化方式-Electronic alarm: FPGA-based electronic alarm clock design, modular approach
- 2022-02-06 03:24:59下载
- 积分:1
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bankorder
说明: 银行排队系统的VHDL程序实现,可以实现排队顾客自动取号,查看前面排队人数,银行服务柜台号等。(Bank queuing system VHDL program can be achieved automatically check its customers lined up to view the queue in front of the number of its banking services, such as counters.)
- 2008-11-28 15:49:49下载
- 积分:1
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单相逆变simulink仿真
说明: 利用Matlab/simulink实现电力仿真,其中单相逆变可用于多电平变流器的基础使用,本案例提供了不同调制手段实现逆变的模型(Matlab / Simulink is used to realize power simulation, in which single-phase inverter can be used as the basis of multi-level converter. This case provides the inverter model with different modulation means)
- 2019-11-12 15:03:55下载
- 积分:1