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RS-422standardmodulev2
rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)
- 2013-12-23 14:14:18下载
- 积分：1
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hdmi
HDMI协议的Verilog实现，通过对RGB三个通道分别进行TMDS编码完成，纯原创代码(Verilog implementation of HDMI protocol, through TMDS coding of RGB three channels, pure original code)
- 2020-07-28 16:58:46下载
- 积分：1
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ex4
statemachine project for my school
- 2011-12-02 21:07:27下载
- 积分：1
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auk_sdsdi
说明： 用于FPGA设计的代码（Verilog代码），在FPGA设计中的高速串并转换，时钟提取，对齐处理等功能(for FPGA design ,written by Verilog HDL the functions include SERDES , CDR and so on)
- 2020-11-11 12:39:44下载
- 积分：1
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伺服电机主控制系统简单模拟实现
伺服电机主控制模块输入输出特性的简单模拟实现，输入目标电压及反馈的当前电压，输出对电机的控制脉冲波形(The simple simulation of the input and output characteristics of servo motor main control module, the input is target voltage and feedback is the current voltage, the output is the motor control pulse waveform)
- 2017-07-25 11:16:26下载
- 积分：1
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McBSP_8bit_Asyn
基于FPGA的Mcbsp通信源码，经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)
- 2018-03-19 17:19:17下载
- 积分：1
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hulf
设计一个哈夫曼编码器
要求对一段数据序列进行哈夫曼编码，使得平均码长最短，输出各元素编码和编码后的数据序列。
① 组成序列的元素是[0-9]这10个数字，每个数字其对应的4位二进制数表示。比如5对应0101，9对应1001。
② 输入数据序列的长度为256。
③ 先输出每个元素的编码，然后输出数据序列对应的哈夫曼编码序列。(Designing a Huffman Encoder
Huffman coding is required for a data sequence to minimize the average code length and output the coded and coded data sequence of each element.
(1) The elements that make up the sequence are the 10 digits [0-9], and each digit is represented by its corresponding 4-bit binary number. For example, 5 corresponds to 0101, 9 corresponds to 1001.
(2) The length of the input data sequence is 256.
(3) First output the encoding of each element, and then output the Huffman encoding sequence corresponding to the data sequence.)
- 2019-06-19 21:49:58下载
- 积分：1
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数字钟
数字钟(Digital clock)
- 2018-02-27 21:34:28下载
- 积分：1
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hdl
网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong.
tested.)
- 2009-03-31 22:36:37下载
- 积分：1
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QPSK_modulation
利用FPGA实现QPSK数字调制。编程采用Verilog HDL语言。(By using the FPGA realization of QPSK digital modulation. Use Verilog HDL language programming.
)
- 2016-03-21 19:53:06下载
- 积分：1
