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吠陀乘数使用拟议的 4 位加法器-(URDHVA TIRYAKBHYAM)
吠陀乘数花更少的时间来执行使用的 URDHVA TIRYAKBHYAM 算法从吠陀 》 的乘法晒版程序自动完成。这个源代码是 4 X 4 吠陀乘数使用拟议的 4 位加法器
- 2022-02-03 08:53:04下载
- 积分:1
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Convolution
卷积程序的Verilog程序,实现卷积功能(Convolution program Verilog program to achieve convolution function)
- 2017-10-14 19:46:22下载
- 积分:1
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ht66f0185-1
小家电常用芯片HT66F0185的UART 使用例子,已在产品使用(Small appliances commonly use UART chip HT66F0185 of example, has been used in products)
- 2020-10-09 16:27:34下载
- 积分:1
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DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术,研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分:1
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cpu8bit
这是一个计算机组成原理综合性实验:设计8位cpu。该cpu是8bit的代码,包含有4个寄存器,一个存储器,还有alu以及控制器。一共可以实现16条指令。(This is a computer composition principle of comprehensive experiment: Design 8 cpu. The cpu is 8bit code contains four registers, a memory, as well as alu and controllers. A total of 16 instructions can be achieved.)
- 2020-07-01 08:40:01下载
- 积分:1
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CircuitDesignwithVHDL[1]
这主要是学习vhdl和fpga设计的一些资料(study for vhdl and fpga)
- 2009-05-13 09:31:26下载
- 积分:1
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LDPC_Encoder
说明: verilog 编写的ldpc编码,含有两个文件(LDPC written by Verilog)
- 2021-03-08 19:19:28下载
- 积分:1
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LDPC_FPGA
LDPC码的FPGA实现,大家相互学习下。。(the code of LDPC implementation by FPGA)
- 2020-11-29 16:59:28下载
- 积分:1
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FPGA
基于FPGA的视觉电生理图像刺激系统的设计(Based on the design of FPGA visual electrophysiology image stimulation system)
- 2013-03-08 17:09:29下载
- 积分:1
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regress-900055
The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.
- 2013-12-27 00:29:58下载
- 积分:1