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IPSO
i have coding for verilogHDL and VHDL. so please i want know that coding..
- 2012-04-24 01:01:07下载
- 积分：1
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AES-on-FPGA
AES算法在FPGA上的实现，对AES算法所用的器件资源进行了总结(AES on FPGA the Fastest to the Smallest)
- 2014-12-31 10:06:46下载
- 积分：1
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GUI
1）选择一个语音信号作为分析对象，或录制一段语音信号； 2）对语音信号进行采样，画出采样前后语音信号的时域波形和频谱图； 3）利用MATLAB中的随机函数产生噪声加入到语音信号中，使语音信号被污染，然后进行频谱分析； 4）设计用于处理该语音信号的数字滤波器，给出滤波器的性能指标，画出滤波器的频率响应； 5）对被噪声污染的语音信号进行滤波，画出滤波前后信号的时域波形和频谱，并对滤波前后的信号进行比较和分析； 6）回放各步骤的语音信号，给出相应处理程序及运行结果分析。(1) Select a voice signal as an analysis object, or record a voice signal 2) sampling the voice signal, draw the waveform and frequency spectrum of the time domain before and after sampling the speech signal 3) using the random function in MATLAB generated noise was added to the speech signal, the speech signal to be contaminated, and then spectrum analysis 4) for processing the speech signal, the digital filter design, given the performance of the filter to draw the filter' s frequency response 5) on the noise pollution of the speech signal is filtered, time-domain waveform and spectrum draw before and after filtering the signal before and after filtering, and the signal for comparison and analysis 6) playback of the speech signal for each step, given the results of the corresponding processing procedures and run analysis.)
- 2021-03-18 17:29:19下载
- 积分：1
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8b10b_xilinx
xilinx 的8B10B编解码源码, 里面有仿真模型,用以测试验证(xilinx 8B10B encode/decode source)
- 2018-07-20 16:02:29下载
- 积分：1
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频率计
说明： 1、能正确显示输入信号频率；
2、测量频率范围为1Hz ~ 999999Hz；
3、测量结果以十进制数字显示；
4、能测量幅值较小的信号频率；
5、有自动刷新输出数据的功能（如5s刷新一次）；
6、有自检模块（如产生100Hz的校准方波）；(1. It can correctly display the input signal frequency;
2. The frequency range of measurement is 1Hz ~ 99999hz;
3. The measurement results are displayed in decimal;
4. It can measure signal frequency with small amplitude;
5. It has the function of automatically refreshing the output data (e.g. once in 5S);
6. Self checking module (such as generating 100Hz calibration square wave);)
- 2020-03-28 16:37:56下载
- 积分：1
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fpga
电子密码锁的相关程序，很好很耐用！但水平有限啊！！(Electronic combination lock procedures，
)
- 2010-12-20 21:51:05下载
- 积分：1
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pci9504
Verilog 语言编写 PCI9054 控制器的接口电路，实现 PCI总线到本地 8 位总线的转接控制(The Verilog language writes the interface circuit of the PCI9054 controller to realize the transfer control of the PCI bus to the local 8 bit bus)
- 2020-11-06 11:39:49下载
- 积分：1
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CJ2
关键词：清华大学计算机系 计算机组成原理大实验 多周期cpu工程源码，内含中断，串口，以及31个指令的实现，读写内存，控制器，ALU，寄存器，分频等模块，小作业什么的可以直接从里面摘抄，为学弟学妹造福(Keywords: Department of Computer Science Computer Composition Principle experimental multi-cycle the cpu Engineering source for the benefit of mentees)
- 2020-12-29 10:09:01下载
- 积分：1
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Verilog-Generator-of-Neural-Networks
利用DE0nano开发板实现了对用的卷积神经网络(The CNN algorithm is implemented.based FPGA)
- 2018-11-22 15:26:05下载
- 积分：1
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QC_LDPC译码器的FPGA设计
说明： LDPC码的FPGA实现，用verilog语言编写(FPGA implementation of LDPC code, written in Verilog language)
- 2019-11-15 06:04:33下载
- 积分：1
