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VHDL-the-count
利用VHDL 硬件描述语言设计一个0~9999 的加法计数器。根据一定频率的触发
时钟，计数器进行加计数，并利用数码管进行显示，当计数到9999 时，从0 开始重新计数(Use of VHDL hardware description language design a 0 ~ 9999 addition counter. According to a certain frequency of the trigger
The clock, counter add count, and use digital pipes to show that when the count to 9999, starting from 0 to count
)
- 2012-01-13 14:01:38下载
- 积分：1
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PCI_PIO
不足20元的PCI设计，含ABEL源代码。(PCI design less than 20Yuan ,including ABEL code)
- 2005-08-28 02:44:26下载
- 积分：1
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alpha-beta
阿尔法贝塔滤波器，是卡曼滤波器的简化，比卡曼滤波器速度快。这是一个实例。(aplha-beta filter is filter that faster than kalman filter)
- 2020-11-25 20:09:31下载
- 积分：1
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gio_mio_emio_axi
codes for zynq devices
- 2014-06-23 19:00:03下载
- 积分：1
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61EDA_B79
书名：LDPC原理与应用。是国内第一本介绍用LDPC编、译码基本原理及应用技术的一本书。对用 vhdl 或verilog实现硬件编程LDPC的人开发无线通信是很好的资料(Title: LDPC Principles and Applications. Is the first book describes using LDPC Encoding and Decoding the basic principles and application of technology, a book. Right to use vhdl or verilog hardware programming LDPC people to achieve development of wireless communications is a very good information)
- 2009-10-30 10:36:35下载
- 积分：1
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VHDL实现 8051 CPU核 Oregano Systems 8
VHDL实现 8051 CPU核 Oregano Systems 8-bit Microcontroller IP-Core-VHDL 8051 CPU nuclear Oregano Systems 8-bit Mic rocontroller IP-Core
- 2022-01-21 00:52:30下载
- 积分：1
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altera的关于对数计算的IP core。
altera的关于对数计算的IP core。-altera calculated on the logarithm of the IP core.
- 2022-09-17 13:25:03下载
- 积分：1
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AHB-answers
这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)
- 2020-10-21 12:17:24下载
- 积分：1
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cic
cic设计 verilog verilog(cic verilog design verilog)
- 2012-10-23 20:13:52下载
- 积分：1
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encode
（7 4）汉明编码源程序，简单实用，可供大家下载，如有问题，望大家多多包含！((74) Hamming code source, simple and practical, available for everyone to download and, if problems, hope you lot included!)
- 2010-01-13 11:37:25下载
- 积分：1
